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US3725818A Expired / Lapsed US ⏱️ 0.0 years remaining

Voter circuits for three-channel redundant systems

Assignee: Allard Way Holdings Ltd
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Filing: 1971-09-15
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Granted: 1973-04-03
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Expires: 1991-09-15
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Abstract

Abstract This invention relates to voter circuits for three-channel redundant systems, ''''synchronizing'''' the signals in the channels. The channel 2 signal is normally fed straight through, and is compared with the signals in channels 1 and 3 by limited authority amplifiers A1 and A2 whose outputs are added into channels 1 and 3 to bring those channel outputs into near equality with channel 2. Faults are detected by a fault detector 16, which detects when any one channel input differs by more than a preset small amount from the other two channels. For channel 1 or channel 3 faults, the input for that channel is switched to channel 2 or channel 1 respectively. For channel 2 faults, the input for that channel is switched to channel 3; additionally, a fader circuit 20 is switched in. This stores the difference between channels 2 and 3 just before the fault, adds it to the outputs, and gradually fades out this difference until the outputs are following channel 3 instead of channel 2. Transients in the outputs following a fault are thus eliminated without affecting the frequency response of the system to changes in the inputs.

Inventors

  • 👤 A Nurmohamed
  • 👤 R Watters

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 21:21
CPC Classifications
G; G05; G05D; G05D1/00; G05D1/0055; G05D1/0077; H; H03; H03K; H03K19/00; H03K19/003; H03K19/00392

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 173 words
A voter circuit for a triple redundant system having three inputs and three outputs comprising monitoring circuitry for receiving signals from all three inputs and for producing an output signal in the event of failure of at least one of the inputs, synchronizing circuitry for receiving signals from all three inputs and operable by the output of the monitoring circuit to maintain all three outputs equal at a value which is a predetermined function of the three input signals and track/fader circuitry for receiving two of said inputs so as under normal operation to continuously track the disparity between said two inputs and for receiving an output from said monitoring circuitry, said monitoring circuit output acting to cause the track/fader circuitry to change from a track configuration to a fade configuration to produce an output voltage which decays slowly to zero with a relatively long time constant, said output voltage being connected to the synchronizing circuitry so that the outputs of the synchronizing circuitry do not exhibit step changes following an input failure.
Claim 2
Dependent Claim 173 words
A voter circuit for a triple redundant system having three inputs and three outputs comprising monitoring circuitry for receiving signals from all three inputs and for producing an output signal in the event of failure of at least one of the inputs, synchronizing circuitry for receiving signals from all three inputs and operable by the output of the monitoring circuit to maintain all three outputs equal at a value which is a predetermined function of the three input signals and track/fader circuitry for receiving two of said inputs so as under normal operation to continuously track the disparity between said two inputs and for receiving an output from said monitoring circuitry, said monitoring circuit output acting to cause the track/fader circuitry to change from a track configuration to a fade configuration to produce an output voltage which decays slowly to zero with a relatively long time constant, said output voltage being connected to the synchronizing circuitry so that the outputs of the synchronizing circuitry do not exhibit step changes following an input failure.
Claim 3
Dependent Claim 270 words
A circuit according to claim 6 in which: the synchronizing circuitry has three channels which extend between respective ones of the three inputs and respective ones of three oUtput summing amplifiers; an error amplifier has its inputs connected between one pair of channels, and another error amplifier has its inputs connected between another pair of channels, one of the channels, hereinafter called the ''''master'''' channel, being common to both error amplifiers, and the outputs of the error amplifiers are respectively connected to the output summing amplifier of the other two channels, hereinafter called the ''''slave channels'''', in order to remove the error between inputs associated with the slave channel and the input associated with the master channel; associated switching circuitry is controlled by the monitoring circuitry so as, when any one input signal exceeds the other two by more than a prescribed threshold, to disconnect the said any one input and to connect a predetermined one of the remaining inputs to the error and summing output amplifiers to which the ''''failed'''' input was previously connected; the track/fader circuitry has inputs which, in the absence of an input failure, are connected to the master and a predetermined one of the slave channels, which predetermined slave channel is utilized as the synchronizing reference for the error amplifiers following failure of the input to the master channel; and in which following failure of the master input the track/fader circuitry is switched by the monitoring circuitry to the fade configuration and connected to the output summing amplifiers in order to eliminate the step change which would otherwise occur at each of the three outputs.
Claim 4
Dependent Claim 23 words
A circuit according to claim 2 in which the track/fader circuitry comprises three substantially identical track/fader circuits respectively associated with the three channels.
Claim 5
Dependent Claim 306 words
A system according to claim 1 in which: the synchronizing circuitry has three channels which extend between respective ones of three output summing amplifiers; there are three averaging amplifiers whose inputs are connected to the same two system inputs and the outputs of which are respectively connected to three error amplifiers, which error amplifiers are also connected to different ones of the three channels, and the outputs of the error amplifiers are connected to different ones of the three output summing amplifiers; the error amplifiers effectively synchronize each input to the value of the average of the said two system inputs; associated switching circuitry is controlled by the monitoring circuitry so as, when any one input exceeds the other two by more than a prescribed threshold, to disconnect the said any one input and also the connections between the averaging amplifiers and the error amplifiers in the case of a failure of the said two system inputs and to connect a predetermined one of the remaining inputs to the error and summing output amplifiers to which the ''''failed'''' input was previously connected and also to connect the other system input to the error amplifiers in place of the connections from the averaging amplifiers, in the case of a failure of either of the said two system inputs; and the track/fader circuitry has inputs which are normally, i.e. in the absence of an input failure, connected to the averaging amplifiers and the said other system input which is utilized as the synchronizing reference for the error amplifiers, and following failure of one of the said two system inputs the track/fader circuitry is switched by the monitoring circuitry from its track to its fade configuration connected to the output summing amplifiers in order to eliminate the step change which would otherwise occur at each of the three outputs.
Claim 6
Dependent Claim 23 words
A system according to claim 4 in which the track/fader circuitry comprises three substantially identical track/fader circuits respectively associated with the three channels.

References Cited (Backward Citations)

US3054039A Cited
US3631352A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-04-02 1976-10-02 1977-04-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-04-02 1980-10-02 1981-04-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-04-02 1984-10-02 1985-04-03 $7700.00 Window Closed / Lapsed

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