US3725800A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Agc network
Assignee: Electrohome Ltd
•
Filing: 1971-09-07
•
Granted: 1973-04-03
•
Expires: 1991-09-07
Abstract
Abstract An AGC network connected between the input and output terminals of an amplifier avoids distortion and yet permits the preamplifier to provide a high level output signal. A part of the output signal of the amplifier is rectified, filtered and applied to a transistor to develop in its output circuit two D.C. signals that are applied to the base-emitter junctions of two transistors of opposite conductivity types that shunt the input terminal of the amplifier.
Inventors
- 👤 J Papay
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:01
CPC Classifications
D; D06; D06L; D06L1/00; D06L1/12; D06L1/14; D06L4/00; D06L4/10; D06L4/12; D06L4/13; H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/0082; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G3/301; H03G3/3015
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
211 words
In combination with an amplifier having an input terminal for receiving an input signal and an output terminal at which an output signal is derived, an automatic gain control network connected between said input and output terminals, said automatic gain control network comprising means for rectifying a part of the output signal of said amplifier to provide a D.C. signal that varies with the magnitude of said output signal, firsT and second complementary transistors of opposite conductivity types each having input, output and common electrodes, first and second attenuating networks having substantially the same A.C. impedance connected to said input terminal for attenuating said input signal in response to an increase in said output signal beyond a predetermined level, said first attenuating network including said output and common electrodes of said first transistor, said second attenuating network including said output and common electrodes of said second transistor, said transistors being A.C. connected in parallel and both in the same common electrode configuration, and means for deriving from said D.C. signal and for applying to said input electrodes of said first and second transistors respectively first and second signals respectively that simultaneously vary the resistances of said first and second transistors respectively in the same direction and to substantially the same extent.
Claim 2
Dependent Claim
211 words
In combination with an amplifier having an input terminal for receiving an input signal and an output terminal at which an output signal is derived, an automatic gain control network connected between said input and output terminals, said automatic gain control network comprising means for rectifying a part of the output signal of said amplifier to provide a D.C. signal that varies with the magnitude of said output signal, firsT and second complementary transistors of opposite conductivity types each having input, output and common electrodes, first and second attenuating networks having substantially the same A.C. impedance connected to said input terminal for attenuating said input signal in response to an increase in said output signal beyond a predetermined level, said first attenuating network including said output and common electrodes of said first transistor, said second attenuating network including said output and common electrodes of said second transistor, said transistors being A.C. connected in parallel and both in the same common electrode configuration, and means for deriving from said D.C. signal and for applying to said input electrodes of said first and second transistors respectively first and second signals respectively that simultaneously vary the resistances of said first and second transistors respectively in the same direction and to substantially the same extent.
Claim 3
Dependent Claim
93 words
The invention according to claim 1 wherein said means for deriving said first and second signals comprises a third transistor having base, collector and emitter electrodes, first and second resistors and a source of D.C. potential having two terminals, said first resistor being connected between one of said terminals of said source and said emitter electrode of said third transistor, said second resistor being connected between the other terminal of said source and said collector electrode of said third transistor, said D.C. signal being applied to said base electrode of said third transistor.
Claim 4
Dependent Claim
13 words
The invention according to claim 2 wherein one of said resistors is variable.
Claim 5
Dependent Claim
46 words
The invention according to claim 2 wherein said input electrodes are base electrodes, said output electrodes are collector electrodes and said common electrodes are emitter electrodes, said first and second resistors being connected between said base and emitter electrodes of said first and second transistors respectively.
Claim 6
Dependent Claim
38 words
The invention according to claim 4 wherein each of said networks for attenuating said input signal includes a coupling capacitor connected between said input terminal of said amplifier and said collector electrodes of said first and second transistors.
Claim 7
Dependent Claim
13 words
The invention according to claim 5 wherein one of said resistors is variable.
References Cited (Backward Citations)
US3115601A
Cited
US3446987A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-02 | 1976-10-02 | 1977-04-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-02 | 1980-10-02 | 1981-04-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-02 | 1984-10-02 | 1985-04-03 | $7700.00 | Window Closed / Lapsed |