Jitter-free trigger control circuit

Claim 1

A trigger control circuit responsive to an input trigger signal from a trigger circuit which changes from a non triggering level to a triggering level and also responsive to a holdoff signal from a triggered circuit for producing a jitter free output signal for triggering said triggered circuit, said control circuit comprising: triggering means for causing production of said output trigger signal; enabling means for producing an enabling signal and responsive to a change in said holdoff signal from a holdoff level to a non holdoff level for causing said enabling signal to change from a non enabling level to an enabling level and also responsive to said triggering level of said input trigger signal to prevent any said change of said enabling signal when said trigger input signal is at said triggering level; said enabling means including means for delivering any said change of said enabling signal to said triggering means and then maintaining said enabling level at said triggering level; input trigger signal delivery means for delivering said input trigger signal to said triggering means and timing such delivery to cause said non triggering level to prevent production of said output signal until after any said change of said enabling signal has been delivered to said triggering means; said timing of said delivery of said input trigger signal to said triggering means also causing a change of level of said input trigger means to said triggering level only after any said change of said enabling signal has been delivered to said trigger means to thereby cause production of said output trigger signal and cause said enabling signal to change back to said non enabling level.

Claim 9

The method of producing a jitter free output trigger signal from an input trigger signal from a trigger circuit which changes from a non triggering level to a triggering level for triggering a triggered circuit under control of a holdoff signal from said triggered circuit which comprises: producing a change in an enabling signal from a non enabling level to an enabling level in response to a change of said holdoff signal from a holdoff level to a non holdoff level; preventing said change of said enabling signal when said input trigger signal is at said non triggering level; employing said change in level of said enabling signal for enabling triggering of said triggered circuit; employing said input trigger signal to cause said triggering of said triggered circuit; and adjusting the timing of said input trigger signal employed for such triggering so that such timed input trigger signal changes from a non triggering level to a triggering level to cause said triggering only after any said change of said enabling signal to an enabling level has occurred.

Claim 10

The method of producing a jitter free output trigger signal from an input trigger signal from a trigger circuit which changes from a non triggering level to a triggering level for triggering a triggered circuit under control of a holdoff signal from said triggered circuit which comprises: producing a change in an enabling signal from a non enabling level to an enabling level in response to a change of said holdoff signal from a holdoff level to a non holdoff level; preventing said change of said enabling signal when said input trigger signal is at said non triggering level; employing said change in level of said enabling signal for enabling triggering of said triggered circuit; employing said input trigger signal to cause said triggering of said triggered circuit; and adjusting the timing of said input trigger signal employed for such triggering so that such timed input trigger signal changes from a non triggering level to a triggering level to cause said triggering only after any said change of said enabling signal to an enabling level has occurred.