US3724065A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Fabrication of an insulated gate field effect transistor device
Assignee: Texas Instruments Inc
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Filing: 1970-10-01
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Granted: 1973-04-03
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Expires: 1990-10-01
Abstract
Abstract An insulated gate field effect transistor is fabricated by a sequence of steps beginning with the growth and patterning of a thick oxide layer on an n-type silicon wafer. A thin gatedielectric film is then formed on the exposed silicon surface, followed by deposition and patterning of the gate electrode thereon. The excess gate dielectric is removed, using the electrode as an etch resistant mask, and the wafer is then covered with a boron-doped silane oxide diffusion source for the formation of p-type source and drain regions. The resulting selfaligned and passivated-gate structure is then provided with ohmic contacts to complete the device.
Inventors
- 👤 B Carbajal
- 👤 W Gosney
- 👤 L Hall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 23:13
CPC Classifications
H; H10; H10D; H10D99/00
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
12 words
A method as defined by claim 1 wherein said semiconductor is silicon.
Claim 2
Dependent Claim
44 words
A method as defined by claim 1 wherein said thin insulative film comprises a first layer having a composition selected for compatibility with the semiconductor surface and a second layer having a composition selected for its ability to protect and passivate said first layer.
Claim 3
Dependent Claim
30 words
A method as defined by claim 1 wherein said re-exposed areas of the semiconductor surface are symmetrically located on opposite sides of the remaining portion of said first conductive layer.
Claim 4
Dependent Claim
24 words
A method as defined by claim 1 including the step of covering said doped insulative film with an undoped insulative film to prevent out-diffusion.
Claim 5
Dependent Claim
19 words
A method as defined by claim 2 wherein said thick insulative film is a thermally-grown film of silicon oxide.
Claim 6
Dependent Claim
17 words
A method as defined by claim 6 wherein said thin insulative film is also thermally-grown silicon oxide.
Claim 7
Dependent Claim
27 words
A method as defined by claim 6 wherein said thin insulative film includes a thermally grown silicon oxide layer and a chemically vapor-deposited layer of silicon nitride.
Claim 8
Dependent Claim
14 words
A method as defined by claim 8 wherein said first conductive film is molybdenum.
Claim 9
Dependent Claim
31 words
A method as defined by claim 9 wherein the remaining portion of the molybdenum is used as an etch-resistant mask in removing the two separate portions of underlying thin insulative film.
Claim 10
Dependent Claim
26 words
A method as defined by claim 10 wherein the doped insulative film is a chemically vapor-deposited film of silicon oxide containing boron as said impurity therein.
Claim 11
Dependent Claim
28 words
A method as defined by claim 11 wherein the re-exposed areas of the silicon surface are symmetrically located on opposite sidEs of the remaining portion of the molybdenum.
Claim 12
Dependent Claim
14 words
A method as defined by claim 12 wherein the second conductive layer is aluminum.
Claim 13
Dependent Claim
13 words
A method as defined by claim 1 wherein an n-channel device is produced.
Claim 14
Dependent Claim
13 words
A method as defined by claim 1 wherein a p-channel device is produced.
Claim 15
Independent Claim
309 words
A method for the fabrication of an insulated gate field effect device having completely passivated source, drain and gate elctrodes comprising the steps of: forming a thick insulative film on the surface of a monocrystalline semiconductor body of one conductivity type; selectively removing a portion of said film to expose an area of said surface for the formation of a device; forming a thin insulative film on said exposed area; forming a first conductive layer on said thin insulative film; selectively removing a portion of said first conductive layer and the underlying portions of said thin insulative film to re-espose corresponding portions of said exposed area; forming a doped insulative film on said re-exposed areas, said doped film containing a suitable impurity for the conversion of said re-exposed areas and underlying surface semiconductor regions to the opposite conductivity type; forming an undoped insulative film over said doped film, said undoped film having different etch characteristics than said doped film; heating the composite structure to a temperature sufficiently high to cause diffusion of said impurity from the doped film into the re-exposed surface regions, thereby converting said regions to the opposite conductivity type said undoped film effectively preventing outdiffusion, said heating producing an impurity gradient through the thickness of said doped and undoped films; selectively removing three separate portions of said doped and undoped films by etching with an etchant characterized by an etch rate which varies according to the impurity concentration, thereby producing separate access holes to each of said regions of opposite conductivity type, and to the remainder of said first conductivie layer said access holes having sloped sides produced responsive, to said varying etch rate; and depositing and patterning a second conductive layer on said doped film to establish ohmic contact with each of said converted regions and the remaining portion of said first conductive layer, respectively.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-02 | 1976-10-02 | 1977-04-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-02 | 1980-10-02 | 1981-04-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-02 | 1984-10-02 | 1985-04-03 | $7700.00 | Window Closed / Lapsed |