US3723880A
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System for the transmission of multilevel data signals
Assignee: US Philips Corp
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Filing: 1971-02-01
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Granted: 1973-03-27
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Expires: 1991-02-01
Abstract
Abstract A system for the transmission of multilevel data signals in which a multilevel coder incorporated in the transmitter includes a pulse group analyzer which is provided with m output lines which analyses pulse groups each containing k binary pulses of the binary information signals, and applies a pulse series characteristic of the analyzed pulse group to each output line which pulses are applied through a cascade arrangement of amplitude control device and pseudo-ternary code converter incorporated in each output line to a combination device from whose output a 2m + 1 level signal is derived at a frequency spectrum in which spectral zeros occur at prescribed positions. In the receiver this signal is applied to a cascade arrangement of a full-wave rectifier and a level separator including m output lines which are applied to a pulse group shaper with which the original information signals are uniformly recovered.
Inventors
- 👤 Gerwen P Van
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 19:31
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4917; H04L25/4919
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
473 words
A transmission system for the transmission of signals in a prescribed frequency band, comprising a transmitter having a multilevel coder, means applying to said multilevel coder a series of binary input-pulses occurring at instants coinciding with a series of equidistant clock pulses, said binary input pulses having the logical values ''''0'''' or ''''1,'''' said series of binary input pulses being converted by said multilevel coder into a series of multilevel pulses each having any one of at least five different amplitude levels, said multilevel pulse series having a frequency spectrum with spectral zeros occurring at prescribed positions, a receiver having a multilevel decoder, means applying the received multilevel pulse series to said multilevel decoder for converting said multilevel pulse series into a series of binary pulses, said multilevel coder at a transmitter end thereof having a pulse group analyzer controlled by a clock pulse generator and having a number of parallel arranged output circuits connected to a linear combination device to produce a series of multilevel pulses, each of said multilevel pulses capable of assuming any one of a number of amplitude levels corresponding to one more than twice the number of output circuits, said output circuits being respectively provided with mutually equal pseudo-ternary code converters, and all the output circuits less one being respectively provided with an amplitude control device arranged in cascade with a relevant pseudo-ternary code converter, said pulse group analyzer, arranged for analyzing pulse groups consisting of a number of successively applied binary input pulses, means for applying to each one of said parallel arranged output circuits a separate series of binary output pulses having the logical values ''''0'''' or ''''1,'''' said separate series representing the analyzed pulse groups and each composed of a succession of the logical values ''''0'''' and ''''1'''' such that at each instant, one and only one, output pulse of the analyzer has the logical value ''''1,'''' while the number of pulses of each analyzed pulse series is smaller than the number of pulses of a pulse group, said multilevel decoder at a receiver end thereof comprises a cascade arrangement of a rectifier and a level separator, said cascade arrangement having a number of parallel arranged output terminals connected to input terminals of a pulse group shaper, both said level separator and said pulse group shaper being controlled by a local clock pulse generator, said cascade arrangement applying a separate series of binary pulses having the logical values ''''0'''' or ''''1'''' to each of the input terminals of said pulse group shaper, said last series of pulses having different amplitude levels of the multilevel signal, said pulse group shaper converting this last series of pulses into a successive number of pulse groups of binary pulses each corresponding with an analyzed pulse group, whereby the pulses of successive groups form the originally applied input pulse series.
Claim 2
Dependent Claim
473 words
A transmission system for the transmission of signals in a prescribed frequency band, comprising a transmitter having a multilevel coder, means applying to said multilevel coder a series of binary input-pulses occurring at instants coinciding with a series of equidistant clock pulses, said binary input pulses having the logical values ''''0'''' or ''''1,'''' said series of binary input pulses being converted by said multilevel coder into a series of multilevel pulses each having any one of at least five different amplitude levels, said multilevel pulse series having a frequency spectrum with spectral zeros occurring at prescribed positions, a receiver having a multilevel decoder, means applying the received multilevel pulse series to said multilevel decoder for converting said multilevel pulse series into a series of binary pulses, said multilevel coder at a transmitter end thereof having a pulse group analyzer controlled by a clock pulse generator and having a number of parallel arranged output circuits connected to a linear combination device to produce a series of multilevel pulses, each of said multilevel pulses capable of assuming any one of a number of amplitude levels corresponding to one more than twice the number of output circuits, said output circuits being respectively provided with mutually equal pseudo-ternary code converters, and all the output circuits less one being respectively provided with an amplitude control device arranged in cascade with a relevant pseudo-ternary code converter, said pulse group analyzer, arranged for analyzing pulse groups consisting of a number of successively applied binary input pulses, means for applying to each one of said parallel arranged output circuits a separate series of binary output pulses having the logical values ''''0'''' or ''''1,'''' said separate series representing the analyzed pulse groups and each composed of a succession of the logical values ''''0'''' and ''''1'''' such that at each instant, one and only one, output pulse of the analyzer has the logical value ''''1,'''' while the number of pulses of each analyzed pulse series is smaller than the number of pulses of a pulse group, said multilevel decoder at a receiver end thereof comprises a cascade arrangement of a rectifier and a level separator, said cascade arrangement having a number of parallel arranged output terminals connected to input terminals of a pulse group shaper, both said level separator and said pulse group shaper being controlled by a local clock pulse generator, said cascade arrangement applying a separate series of binary pulses having the logical values ''''0'''' or ''''1'''' to each of the input terminals of said pulse group shaper, said last series of pulses having different amplitude levels of the multilevel signal, said pulse group shaper converting this last series of pulses into a successive number of pulse groups of binary pulses each corresponding with an analyzed pulse group, whereby the pulses of successive groups form the originally applied input pulse series.
Claim 3
Dependent Claim
300 words
A transmitter for the transmission of signals in a prescribed frequency band, said transmitter including a multilevel coder and means applying to said multilevel coder a series of binary input pulses occurring at instants coinciding with a series of equidistant clock pulses, said binary input pulses having the logical values ''''0'''' or ''''1,'''' said series of binary input pulses being converted by said multilevel coder into a series of multilevel pulses each having any one of at least five different amplitude levels, said multilevel pulse series having a frequency spectrum with special zeros occurring at prescribed positions, said multilevel coder having a pulse group analyzer controlled by a clock pulse generator and having a number of parallel arranged output circuits connected to a linear combination device to produce a series of multilevel pulses whIch are each capable of assuming any one of a number of amplitude levels, corresponding to one more than twice the number of output circuits, said output circuits being respectively provided with mutually equal pseudo-ternary code converters and all the output circuits less one being respectively provided with an amplitude control device arranged in cascade with the relevant pseudo-ternary code converter, said pulse group analyzer arranged for analyzing pulse groups consisting of a number of successively applied binary input pulses, means for applying to each one of said parallel arranged output circuits a separate series of binary output pulses having the logical values ''''0'''' or ''''1,'''' said separate series representing the analyzed pulse groups, and each composed of a succession of the logical values ''''0'''' and ''''1'''' such that at each instant, one and only one, output pulse of the analyzer has the logical value ''''1,'''' while the number of pulses of each analyzed pulse series is smaller than the number of pulses of a pulse group.
Claim 4
Dependent Claim
300 words
A transmitter for the transmission of signals in a prescribed frequency band, said transmitter including a multilevel coder and means applying to said multilevel coder a series of binary input pulses occurring at instants coinciding with a series of equidistant clock pulses, said binary input pulses having the logical values ''''0'''' or ''''1,'''' said series of binary input pulses being converted by said multilevel coder into a series of multilevel pulses each having any one of at least five different amplitude levels, said multilevel pulse series having a frequency spectrum with special zeros occurring at prescribed positions, said multilevel coder having a pulse group analyzer controlled by a clock pulse generator and having a number of parallel arranged output circuits connected to a linear combination device to produce a series of multilevel pulses whIch are each capable of assuming any one of a number of amplitude levels, corresponding to one more than twice the number of output circuits, said output circuits being respectively provided with mutually equal pseudo-ternary code converters and all the output circuits less one being respectively provided with an amplitude control device arranged in cascade with the relevant pseudo-ternary code converter, said pulse group analyzer arranged for analyzing pulse groups consisting of a number of successively applied binary input pulses, means for applying to each one of said parallel arranged output circuits a separate series of binary output pulses having the logical values ''''0'''' or ''''1,'''' said separate series representing the analyzed pulse groups, and each composed of a succession of the logical values ''''0'''' and ''''1'''' such that at each instant, one and only one, output pulse of the analyzer has the logical value ''''1,'''' while the number of pulses of each analyzed pulse series is smaller than the number of pulses of a pulse group.
Claim 5
Dependent Claim
73 words
A transmitter as claimed in claim 2, wherein the relationship represented by k/n < or = 2 log (m+1) exists between an m number of output circuits of the pulse group analyzer, and the ratio of the number of binary pulses k in a pulse group to be analyzed with the number of binary pulses n in the analyzed pulse series which are applied to the output circuits of the pulse group analyzer.
Claim 6
Dependent Claim
79 words
A transmitter as claimed in claim 2 for the transmission of a pulse series within which the pulses assume seven amplitude levels, wherein the pulse group analyzer includes three parallel output lines and analyzes pulse groups (0,0) ; (0,1) ; (1,1) ; and (1,0) of the binary pulse series and provides a binary pulse to not more than one of its output lines characteristic of each pulse group but taken for not more than three of these pulse groups.
Claim 7
Dependent Claim
39 words
A transmitter as claimed in claim 2, wherein the pseudo-ternary code converter includes a band-producing element which is constituted by a linear combination device to which a binary pulse series is applied directly and indirectly through a delay network.
Claim 8
Dependent Claim
64 words
A transmitter as claimed in claim 5, wherein the band-producing element is preceded by a modulo-2- combination device to which, on the one hand the pulse series occurring at the output line of the pulse group analyzer is applied, and to which on the other hand the pulse series which occurs at the output of the modulo-2-combination device is applied through the delay network.
Claim 9
Dependent Claim
66 words
A transmitter as claimed in claim 5, in which the ratio of a delay period of the delay network with a pulse duration of the pulses of the pulse series applied to the band-producing element is equal to an integral second power, wherein the band-producing element is preceded by a cascade arrangement of a number of change-of-state modulators which number is equal to the second power.
Claim 10
Dependent Claim
87 words
A transmitter as claimed in claim 5, characterized in that the band-producing element is formed by a digital filter consisting of a cascade arrangement of a number of shift register elements, whose contents are shifted by a control generator connected to the clock pulse inputs of the shift register elements, the shift register elements being connected through attenuation networks to a combination device, the attenuation networks being pairwise equal starting from exterior attenuation networks, while pulse signals of equal polarity are applied to mutually equal attenuation networks.
Claim 11
Dependent Claim
56 words
A transmitter as claimed in claim 8, wherein the shift register elements of the digital filter are connected through a second series of attenuation networks to a second combination device, the attenuation networks being pairwise equal starting from the exterior attenuation network while pulse signals of different polarity are applied to the mutually equal attenuation networks.
Claim 12
Dependent Claim
71 words
A transmitter as claImed in claim 9, wherein a same amplitude-frequency characteristic which suppresses a direct current term is generated at both combination devices by proportioning the two attenuation networks, said combination devices being connected to individual modulators to which carriers are also applied which are mutually shifted over pi /2, said carriers originate from a common carrier oscillator, and outputs of the modulators are connected to a second combination device.
Claim 13
Dependent Claim
24 words
A transmitter as claimed in claim 9, wherein the combination device is connected to a modulator to which also a carrier oscillator is connected.
Claim 14
Dependent Claim
172 words
A receiver suitable for use in a transmission system, said receiver including a multilevel decoder and means for applying a received multilevel pulse series to said multilevel decoder for converting said multilevel pulse series into a series of binary pulses, said multilevel decoder at the receiver end thereof, comprising a cascade arrangement of a rectifier and a level separator, said cascade arrangement having a number of parallel arranged output terminals connected to input terminals of a pulse group shaper, both said level separator and said pulse group shaper being controlled by a local clock pulse generator, said cascade arrangement applying a separate series of binary pulses having the logical values ''''0'''' or ''''1'''' to each of the input terminals of said pulse group shaper, said series representing the different amplitude levels of the multilevel signal are converted by said pulse group shaper into successive pulse groups of a number of binary pulses each corresponding with an analyzed pulse group, whereby the pulses of successive groups form the originally applied input pulse series.
Claim 15
Dependent Claim
172 words
A receiver suitable for use in a transmission system, said receiver including a multilevel decoder and means for applying a received multilevel pulse series to said multilevel decoder for converting said multilevel pulse series into a series of binary pulses, said multilevel decoder at the receiver end thereof, comprising a cascade arrangement of a rectifier and a level separator, said cascade arrangement having a number of parallel arranged output terminals connected to input terminals of a pulse group shaper, both said level separator and said pulse group shaper being controlled by a local clock pulse generator, said cascade arrangement applying a separate series of binary pulses having the logical values ''''0'''' or ''''1'''' to each of the input terminals of said pulse group shaper, said series representing the different amplitude levels of the multilevel signal are converted by said pulse group shaper into successive pulse groups of a number of binary pulses each corresponding with an analyzed pulse group, whereby the pulses of successive groups form the originally applied input pulse series.
Claim 16
Dependent Claim
68 words
A receiver as claimed in claim 12, wherein the level separator includes three parallel output lines in which each output line is constituted by an output line of a sampler to which the information signals obtained after demodulation are applied, a sampling signal being additionally applied to the samplers, which signal originates from a local clock pulse generator, while a reference voltage source is connected to each sampler.
Claim 17
Dependent Claim
49 words
A receiver as claimed in claim 13, for the reception of pulse signals within which the pulses assume seven levels, wherein the pulse group shaper is provided with three parallel input lines and which converts pulses occurring therein into pulse groups (0,0) ; (0,1) ; (1,1) ; and (1,0).
Claim 18
Dependent Claim
103 words
A receiver as claimed in claim 14, wherein one of the input lines of the pulse group shaper is applied at one end thereof to an OR-gate and at another end thereof to two selection gates, and a second input line is applied to both selection gates, a third input line being applied to one of the selection gates, an output of one of the selection gates being applied directly at one end thereof and through a delay network at another end thereof, to the OR-gate, an output of the other selection gate is likewise connected to the OR-gate through a delay network.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-03-26 | 1976-09-25 | 1977-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-03-26 | 1980-09-25 | 1981-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-03-26 | 1984-09-25 | 1985-03-27 | $7700.00 | Window Closed / Lapsed |