US3723833A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Heat sinking of semiconductor integrated circuit devices
Assignee: RCA Corp
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Filing: 1971-07-19
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Granted: 1973-03-27
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Expires: 1991-07-19
Abstract
Abstract A semiconductor device of the type in which a semiconductor chip is mounted on a lead assembly having a chip mounting portion, thermal conductors, and electrical conductors. The chip has some elements which generate heat, which are located in one zone of the chip, and others which are sensitive to spatial thermal gradients, which are located in a different zone of the chip. The chip mounting portion of the lead assembly has an area substantially free of spatial thermal gradients and the zone of the chip containing the sensitive elements is mounted adjacent to this area.
Inventors
- 👤 C Wheatley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 15:47
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/461
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
107 words
A semiconductor device comprising a semiconductor integrated circuit chip having heat generating elements and elements which are sensitive to spatial thermal gradients, said heat generating elements being disposed in a first zone of said chip and said thermal gradient sensitive elements being disposed in a second zone of said chip, and means for supporting said chip, said means having a first portion for removing heat from said chip on which said first zone of said chip is disposed and a second portion on which said second zone of said chip is disposed, said second portion of said chip supporting means being substantially free of spatial thermal gradients.
Claim 2
Dependent Claim
107 words
A semiconductor device comprising a semiconductor integrated circuit chip having heat generating elements and elements which are sensitive to spatial thermal gradients, said heat generating elements being disposed in a first zone of said chip and said thermal gradient sensitive elements being disposed in a second zone of said chip, and means for supporting said chip, said means having a first portion for removing heat from said chip on which said first zone of said chip is disposed and a second portion on which said second zone of said chip is disposed, said second portion of said chip supporting means being substantially free of spatial thermal gradients.
Claim 3
Dependent Claim
22 words
A semiconductor device as defined in claim 1 further comprising thermal conductors extending from said first portion of said chip supporting means.
Claim 4
Dependent Claim
46 words
A semiconductor device as defined in claim 2 wherein said chip supporting means is a flat plate having a row of apertures therethrough, said first and second portions of said chip supporting means being portions of said plate on opposite sides of said row of apertures.
Claim 5
Dependent Claim
32 words
A semiconductor device as defined in claim 2 wherein said second portion of said chip supporting means is coupled to said first portion of said chip supporting means through thermal resistance means.
Claim 6
Dependent Claim
68 words
A semiconductor device as defined in claim 4 wherein said second portion of said chip supporting means is integral with said first portion of said chip supporting means, said thermal resistance means comprising a region between said first and second portions of said chip supporting means, said region having a cross sectional area substantially less than that of said first and second portions of said chip supporting means.
Claim 7
Dependent Claim
148 words
A semiconductor device comprising a semiconductor integrated circuit chip having heat generating elements and elements which are sensitive to spatial thermal gradients, said heat generating elements being disposed in a first zone of said chip and said thermal gradient sensitive elements being disposed in a second zone of said chip, and a lead assembly including a chip supporting pad, thermal conductors extending from said chip supporting pad, and a plurality of electrical conductors having ends disposed adjacent to said chip suppOrting pad, said chip supporting pad having a first portion thermally coupled to said thermal conductors and a second portion substantially thermally isolated from said thermal conductors, said integrated circuit chip being mounted on said chip supporting pad of said lead assembly with said first zone on said first portion of said chip supporting pad and said second zone on said second portion of said chip supporting pad.
Claim 8
Dependent Claim
148 words
A semiconductor device comprising a semiconductor integrated circuit chip having heat generating elements and elements which are sensitive to spatial thermal gradients, said heat generating elements being disposed in a first zone of said chip and said thermal gradient sensitive elements being disposed in a second zone of said chip, and a lead assembly including a chip supporting pad, thermal conductors extending from said chip supporting pad, and a plurality of electrical conductors having ends disposed adjacent to said chip suppOrting pad, said chip supporting pad having a first portion thermally coupled to said thermal conductors and a second portion substantially thermally isolated from said thermal conductors, said integrated circuit chip being mounted on said chip supporting pad of said lead assembly with said first zone on said first portion of said chip supporting pad and said second zone on said second portion of said chip supporting pad.
Claim 9
Dependent Claim
21 words
A semiconductor device as defined in claim 6 wherein said chip supporting pad and said thermal conductors are integral and coplanar.
Claim 10
Dependent Claim
26 words
A semiconductor device as defined in claim 7 wherein said chip supporting pad has thermal resistance means between said first portion and said second portion thereof.
Claim 11
Dependent Claim
47 words
A semiconductor device as defined in claim 8 wherein said thermal resistance means is a region between said first and second portions of said chip supporting pad having a cross sectional area substantially less than that of said first and second portions of said chip supporting pad.
Claim 12
Dependent Claim
32 words
A semiconductor device as defined in claim 8 wherein said thermal resistance means is a plurality of apertures through said chip supporting pad between said first portion and said second portion thereof.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-03-26 | 1976-09-25 | 1977-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-03-26 | 1980-09-25 | 1981-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-03-26 | 1984-09-25 | 1985-03-27 | $7700.00 | Window Closed / Lapsed |