US3720920A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Open-ended computer with selectable 1/0 control
Assignee: Texas Instruments Inc
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Filing: 1971-03-01
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Granted: 1973-03-13
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Expires: 1991-03-01
Abstract
Abstract An automatic data processing machine of open-ended construction having communication register units in a peripheral process that are addressable by means of a single instruction in the bit, byte, half-word or full-word level for implementing a broad range of I/O operations.
Inventors
- 👤 W Watson
- 👤 E Husband
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 11:00
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/10; G06F13/12; G06F13/124; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/05; G05B19/052; G06F3/00; G06F9/00; G06F9/06; G06F9/30; G06F9/30003; G06F9/30007; G06F9/30018; G06F9/30036; G06F9/30038; G05B2219/00; G05B2219/10; G05B2219/15; G05B2219/15127; G05B2219/30; G05B2219/45; G05B2219/45051
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
90 words
A data processing system comprising: a. a processing unit adapted to decode instrUctions, b. a memory for storing said instructions, c. a communication register having a plurality of bit positions, d. a controlled device connected directly to one bit position in said communication register, said controlled device responsive to the control state of said one bit position, and e. means responsive to an instruction decoded by said processing unit directly addressing said one bit position in said communication register, said one bit position when directly addressed controlling said controlled device.
Claim 2
Dependent Claim
90 words
A data processing system comprising: a. a processing unit adapted to decode instrUctions, b. a memory for storing said instructions, c. a communication register having a plurality of bit positions, d. a controlled device connected directly to one bit position in said communication register, said controlled device responsive to the control state of said one bit position, and e. means responsive to an instruction decoded by said processing unit directly addressing said one bit position in said communication register, said one bit position when directly addressed controlling said controlled device.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-03-12 | 1976-09-11 | 1977-03-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-03-12 | 1980-09-11 | 1981-03-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-03-12 | 1984-09-11 | 1985-03-13 | $7700.00 | Window Closed / Lapsed |