US3720879A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low-capacity, high impedance circuit
Assignee: United States Department of the Army
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Filing: 1972-04-17
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Granted: 1973-03-13
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Expires: 1992-04-17
Abstract
Abstract This invention relates to amplifiers and particularly to lowinput-capacitance, high-input-impedance amplifiers. More particularly, this invention relates to an amplifier using a dual-gate, field-effect transistor with circuitry for increasing the effective input impedance and reducing the effective input capacitance of the dual-gate field-effect transistor to an extremely low value.
Inventors
- 👤 R Reitmeyer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 22:40
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/193
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
197 words
In combination with a dual-gate field-effect transistor having source, drain, first gate, and second gate electrodes, a source of positive voltage with respect to ground connected to said drain electrode; a constant-current load impedance connected between a source of negative voltage with respect to ground and said source electrode; first and second biasing resistors connected in series between said first gate electrode and ground; a shield for said circuit; means for connecting a source of input signal to said first gate electrode; means for connecting an output terminal to said source electrode; means for connecting a source of positive bias voltage to said second gate electrode; means for applying in-phase feedback from said source electrode to said second gate, to reduce the effective capacity between said first and second gate electrodes; means for Applying in phase feedback from said source electrode to the junction of said first and second resistors, to increase the effective input resistance of said first gate electrode; and means for applying in-phase feedback from said source electrode to said shield, to reduce the effective capacity between said shield and said means for connecting a source of input signals to said first gate electrode.
Claim 2
Dependent Claim
197 words
In combination with a dual-gate field-effect transistor having source, drain, first gate, and second gate electrodes, a source of positive voltage with respect to ground connected to said drain electrode; a constant-current load impedance connected between a source of negative voltage with respect to ground and said source electrode; first and second biasing resistors connected in series between said first gate electrode and ground; a shield for said circuit; means for connecting a source of input signal to said first gate electrode; means for connecting an output terminal to said source electrode; means for connecting a source of positive bias voltage to said second gate electrode; means for applying in-phase feedback from said source electrode to said second gate, to reduce the effective capacity between said first and second gate electrodes; means for Applying in phase feedback from said source electrode to the junction of said first and second resistors, to increase the effective input resistance of said first gate electrode; and means for applying in-phase feedback from said source electrode to said shield, to reduce the effective capacity between said shield and said means for connecting a source of input signals to said first gate electrode.
Claim 3
Dependent Claim
197 words
In combination with a dual-gate field-effect transistor having source, drain, first gate, and second gate electrodes, a source of positive voltage with respect to ground connected to said drain electrode; a constant-current load impedance connected between a source of negative voltage with respect to ground and said source electrode; first and second biasing resistors connected in series between said first gate electrode and ground; a shield for said circuit; means for connecting a source of input signal to said first gate electrode; means for connecting an output terminal to said source electrode; means for connecting a source of positive bias voltage to said second gate electrode; means for applying in-phase feedback from said source electrode to said second gate, to reduce the effective capacity between said first and second gate electrodes; means for Applying in phase feedback from said source electrode to the junction of said first and second resistors, to increase the effective input resistance of said first gate electrode; and means for applying in-phase feedback from said source electrode to said shield, to reduce the effective capacity between said shield and said means for connecting a source of input signals to said first gate electrode.
Claim 4
Dependent Claim
197 words
In combination with a dual-gate field-effect transistor having source, drain, first gate, and second gate electrodes, a source of positive voltage with respect to ground connected to said drain electrode; a constant-current load impedance connected between a source of negative voltage with respect to ground and said source electrode; first and second biasing resistors connected in series between said first gate electrode and ground; a shield for said circuit; means for connecting a source of input signal to said first gate electrode; means for connecting an output terminal to said source electrode; means for connecting a source of positive bias voltage to said second gate electrode; means for applying in-phase feedback from said source electrode to said second gate, to reduce the effective capacity between said first and second gate electrodes; means for Applying in phase feedback from said source electrode to the junction of said first and second resistors, to increase the effective input resistance of said first gate electrode; and means for applying in-phase feedback from said source electrode to said shield, to reduce the effective capacity between said shield and said means for connecting a source of input signals to said first gate electrode.
Claim 5
Dependent Claim
74 words
A dual-gate field-effect transistor as in claim 1 wherein said constant-current load impedance comprises a second transistor having emitter, collector, and base electrodes; a third resistor connected in series with said emitter and collector electrodes of said second transistor between said source electrode and said source of negative voltage; a fourth resistor connected between said base electrode and said source of negative voltage and a fifth resistor connected between said base electrode and ground.
References Cited (Backward Citations)
US2795654A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-03-12 | 1976-09-11 | 1977-03-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-03-12 | 1980-09-11 | 1981-03-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-03-12 | 1984-09-11 | 1985-03-13 | $7700.00 | Window Closed / Lapsed |