Semiconductor device with two mos transistors of non-symmetrical type

Claim 1

A semiconductor device comprising: a semiconductor substrate having a first conductivity type; an epitaxial layer having a second conductivity type opposite to that of said substrate, formed on said substrate; a first diffused region, having said first conductivity type, formed in a portion of said epitaxial layer to such a depth that it reaches said semiconductor substrate; second and third diffused regions, having said second conductivity type, and having an impurity concentration different from that of said epitaxial layer formed in said epitaxial layer and being spaced from each other by said first diffused region and respective portions of said epitaxial layer between said first diffused region and each of said second and third diffused regions; a fourth diffused region having said second conductivity type, formed in a portion of said first diffused region and being separated from said epitaxial layer by a portion of said first diffused region in which said fourth diffused region is not diffused; a first electrode electrically connected to said second diffused region; a second electrode electrically connected to said third diffused region; a third electrode disposed over the portion of said first diffused region between the portions of said epitaxial layer, adjacent one of said second and third regions and said fourth diffused region, and adjacent the other of said second and third regions and said fourth diffused region, with an insulation layer disposed between said third electrode and the respective portions of said first diffused region therebeneath; whereby in the presence of a potential between said first and second electrodes, an electrically conductive channel is prevented from being established between said second and third regions in the absence of a gating potential applied to said third electrode.