US3716799A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit arrangement for interference-free recognition of the zero crossings of sine-like signals
Assignee: Individual
•
Filing: 1971-04-05
•
Granted: 1973-02-13
•
Expires: 1991-04-05
Abstract
Abstract An arrangement for recognizing zero crossings of sine-like signals in the presence of interference utilizes a bistable flipflop circuit which is capacitively coupled to receive input signals from a differential amplifier having a pair of inputs which are symmetrical with respect to ground. The coupling capacitors and the bias resistors of the flip-flop circuit provide a switching threshold which is smaller during a succession of useful signals and during receipt of individual interference signals. The flip-flop circuit feeds impulse generating means to provide correctly timed, for example, rectangular signals.
Inventors
- 👤 D Reinhardt
- 👤 G Haass
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:12
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/153; H03K5/1536; H03K5/1532
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
167 words
A circuit arrangement for interference-free recognition of zero crossings of sine-like useful signals of varying amplitude and frequency, preceded by a succession of synchronizing pulses, for producing a timing signal in response to a zero crossing, comprising: a differential amplifier including a pair of inputs for receiving said synchronizing pulses and said sine-like signals and a pair of outputs; a detector circuit including a pair of inputs connected to respective ones of the outputs of said differential amplifier, a pair of outputs, and means for establishing a switching threshold in response to said synchronizing pulses which is smaller in the presence of a succession of useful signals than in the presence of individual interference signals, said detector circuit operable to provide timing pulses at said detector circuit outputs in response to the zero crossings of a signal applied to the inputs of said differential amplifier during the lower switching threshold; and a pair of pulse generators connected to respective ones of the outputs of said detector circuit.
Claim 2
Dependent Claim
167 words
A circuit arrangement for interference-free recognition of zero crossings of sine-like useful signals of varying amplitude and frequency, preceded by a succession of synchronizing pulses, for producing a timing signal in response to a zero crossing, comprising: a differential amplifier including a pair of inputs for receiving said synchronizing pulses and said sine-like signals and a pair of outputs; a detector circuit including a pair of inputs connected to respective ones of the outputs of said differential amplifier, a pair of outputs, and means for establishing a switching threshold in response to said synchronizing pulses which is smaller in the presence of a succession of useful signals than in the presence of individual interference signals, said detector circuit operable to provide timing pulses at said detector circuit outputs in response to the zero crossings of a signal applied to the inputs of said differential amplifier during the lower switching threshold; and a pair of pulse generators connected to respective ones of the outputs of said detector circuit.
Claim 3
Dependent Claim
167 words
A circuit arrangement for interference-free recognition of zero crossings of sine-like useful signals of varying amplitude and frequency, preceded by a succession of synchronizing pulses, for producing a timing signal in response to a zero crossing, comprising: a differential amplifier including a pair of inputs for receiving said synchronizing pulses and said sine-like signals and a pair of outputs; a detector circuit including a pair of inputs connected to respective ones of the outputs of said differential amplifier, a pair of outputs, and means for establishing a switching threshold in response to said synchronizing pulses which is smaller in the presence of a succession of useful signals than in the presence of individual interference signals, said detector circuit operable to provide timing pulses at said detector circuit outputs in response to the zero crossings of a signal applied to the inputs of said differential amplifier during the lower switching threshold; and a pair of pulse generators connected to respective ones of the outputs of said detector circuit.
Claim 4
Dependent Claim
167 words
A circuit arrangement for interference-free recognition of zero crossings of sine-like useful signals of varying amplitude and frequency, preceded by a succession of synchronizing pulses, for producing a timing signal in response to a zero crossing, comprising: a differential amplifier including a pair of inputs for receiving said synchronizing pulses and said sine-like signals and a pair of outputs; a detector circuit including a pair of inputs connected to respective ones of the outputs of said differential amplifier, a pair of outputs, and means for establishing a switching threshold in response to said synchronizing pulses which is smaller in the presence of a succession of useful signals than in the presence of individual interference signals, said detector circuit operable to provide timing pulses at said detector circuit outputs in response to the zero crossings of a signal applied to the inputs of said differential amplifier during the lower switching threshold; and a pair of pulse generators connected to respective ones of the outputs of said detector circuit.
References Cited (Backward Citations)
US3461390A
Cited
US3480800A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-02-13 | 1976-08-14 | 1977-02-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-02-13 | 1980-08-14 | 1981-02-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-02-13 | 1984-08-14 | 1985-02-13 | $7700.00 | Window Closed / Lapsed |