US3716675A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Flexible translator
Assignee: AT&T Inc
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Filing: 1971-12-08
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Granted: 1973-02-13
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Expires: 1991-12-08
Abstract
Abstract A flexible translator arranged to translate one, three, and four digit input numbers into three digit output numbers. The translator includes a plurality of identical two and three terminal code gates each having an output defining the first two digits of the output numbers. The translator is arranged so that a single digit input enables digit detecting circuitry and a two terminal code gate to pass predetermined signals through the translator to obtain a corresponding three digit output number. The translator is further arranged so that the first two digits of three and four digit input numbers enable two terminals of predetermined ones of the three terminal code gates. For a three digit input number, the digit detecting circuitry enables the third terminal of preselected code gates and passes the last digit of the input number through the translator to obtain the three digit output number. For a four digit input number, the digit detecting circuitry utilizes the third digit of the four digit input number to enable the third terminal of other code gates and passes the last digit of the input number through the translator to obtain the three digit output number.
Inventors
- 👤 J Marek
- 👤 G Taylor
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 16:10
CPC Classifications
H; H04; H04Q; H04Q3/00; H04Q3/58; H04Q3/62; H04Q3/625
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
179 words
A translator for translating multidigit input numbers into multidigit output numbers comprising multiterminal means enabled by first and second coincident signals for generating first ones of the digits of the output numbers, means including a first plurality of code points selectively connected to certain input terminals of said multiterminal means for pretranslating first ones of the digits of the input numbers into said first coincident signals and for associating said first coincident signals with predetermined ones of said code points, means including a second plurality of code points and a common code point selectively connected to other input terminals of said multiterminal means for pretranslating a subsequent one of the digits of the input numbers and the absence of a predetermined one of the digits of the input numbers into said second coincident signals and for selectively associating said second coincident signals with predetermined ones of said second plurality of code points and said common code point, and means responsive to the number of the digits of the input numbers for controlling the pretranslation of said second coincident signals.
Claim 2
Dependent Claim
179 words
A translator for translating multidigit input numbers into multidigit output numbers comprising multiterminal means enabled by first and second coincident signals for generating first ones of the digits of the output numbers, means including a first plurality of code points selectively connected to certain input terminals of said multiterminal means for pretranslating first ones of the digits of the input numbers into said first coincident signals and for associating said first coincident signals with predetermined ones of said code points, means including a second plurality of code points and a common code point selectively connected to other input terminals of said multiterminal means for pretranslating a subsequent one of the digits of the input numbers and the absence of a predetermined one of the digits of the input numbers into said second coincident signals and for selectively associating said second coincident signals with predetermined ones of said second plurality of code points and said common code point, and means responsive to the number of the digits of the input numbers for controlling the pretranslation of said second coincident signals.
Claim 3
Dependent Claim
179 words
A translator for translating multidigit input numbers into multidigit output numbers comprising multiterminal means enabled by first and second coincident signals for generating first ones of the digits of the output numbers, means including a first plurality of code points selectively connected to certain input terminals of said multiterminal means for pretranslating first ones of the digits of the input numbers into said first coincident signals and for associating said first coincident signals with predetermined ones of said code points, means including a second plurality of code points and a common code point selectively connected to other input terminals of said multiterminal means for pretranslating a subsequent one of the digits of the input numbers and the absence of a predetermined one of the digits of the input numbers into said second coincident signals and for selectively associating said second coincident signals with predetermined ones of said second plurality of code points and said common code point, and means responsive to the number of the digits of the input numbers for controlling the pretranslation of said second coincident signals.
Claim 4
Dependent Claim
179 words
A translator for translating multidigit input numbers into multidigit output numbers comprising multiterminal means enabled by first and second coincident signals for generating first ones of the digits of the output numbers, means including a first plurality of code points selectively connected to certain input terminals of said multiterminal means for pretranslating first ones of the digits of the input numbers into said first coincident signals and for associating said first coincident signals with predetermined ones of said code points, means including a second plurality of code points and a common code point selectively connected to other input terminals of said multiterminal means for pretranslating a subsequent one of the digits of the input numbers and the absence of a predetermined one of the digits of the input numbers into said second coincident signals and for selectively associating said second coincident signals with predetermined ones of said second plurality of code points and said common code point, and means responsive to the number of the digits of the input numbers for controlling the pretranslation of said second coincident signals.
Claim 5
Dependent Claim
28 words
A translator in accordance with claim 1 further comprising means for selectively employing the last digit of the input numbers as the last digit of the output numbers.
Claim 6
Dependent Claim
98 words
A translator in accordance with claim 1 further comprising a plurality of two terminal code gates for translating single digit input numbers into the first digits of the output numbers, first terminals of said two terminal gates being selectively connected to certain of said first plurality of code points, means responsive to the detection of the single digit input numbers for applying an enabling signal to the second terminals of said two terminal gates, and means for directly employing a predetermined digit as the last digit of the output numbers on detection of the single digit input numbers.
Claim 7
Dependent Claim
47 words
A translator in accordance with claim 1 wherein said multiterminal means comprise a plurality of three terminal code gates, said first coincident signals are applied to the first two terminals of said gates, and said second coincident signals are applied to the third terminals of said gates.
Claim 8
Dependent Claim
162 words
A translator for translating a nonuniform number of input number digits into a uniform number of output number digits comprising means including a plurality of multiterminal code gates responsive to first and second coincident signals for generating first ones of said output number digits, first pretranslator means having a first plurality of code points selectively connected to first input terminals of said gates for applying said first coincident signals thereto in response to first ones of said input number digits, second pretranslator means having a second plurality of code points selectively connected to second input terminals of said gates, means responsive to the number of digits of the input number for determining the selective enablement of said second plurality of code points to provide said second coincident signals to said gates, and means responsive to the number of digits of the input number for employing a last one of the input numbeR digits as a last one of the output number digits.
Claim 9
Dependent Claim
162 words
A translator for translating a nonuniform number of input number digits into a uniform number of output number digits comprising means including a plurality of multiterminal code gates responsive to first and second coincident signals for generating first ones of said output number digits, first pretranslator means having a first plurality of code points selectively connected to first input terminals of said gates for applying said first coincident signals thereto in response to first ones of said input number digits, second pretranslator means having a second plurality of code points selectively connected to second input terminals of said gates, means responsive to the number of digits of the input number for determining the selective enablement of said second plurality of code points to provide said second coincident signals to said gates, and means responsive to the number of digits of the input number for employing a last one of the input numbeR digits as a last one of the output number digits.
Claim 10
Dependent Claim
74 words
A translator in accordance with claim 5 wherein said second plurality of code points includes a plurality of individual code points and a common code point and wherein said means for determining the selective enablement of said second plurality of code points includes logic means responsive to a first number of input digits for enabling said individual code points and responsive to a second number of input digits for enabling said common code point.
Claim 11
Dependent Claim
23 words
A translator in accordance with claim 5 wherein said means for generating first ones of said output number digits includes a post translator.
Claim 12
Dependent Claim
221 words
A translator for use in a switching system wherein called number digits are translated into equipment number digits, the equipment numbers comprising a uniform number of digits while the called numbers comprise a variable number of digits, the translator comprising a plurality of three input terminal code gates, post translator means connected to said code gates for generating first ones of the equipment number digits, means having first code points selectively connected to a first two of said input terminals of said code gates for pretranslating first ones of said called number digits into first coincident signals and associating said first coincident signals with first code points, means having second code points selectively connected to third input terminals of certain of said code gates for pretranslating third digits of four digit called numbers into second coincident signals and associating said second coincident signals with said second code points, means including a common code point selectively connected to third terminals of other of said code gates for generating further second coincident signals for called numbers of only three digits and associating said further second coincident signals with said common code point, and means responsive to the number of digits of the called numbers for selectively controlling the pretranslation of said second coincident signals and the generation of said further second coincident signals.
Claim 13
Dependent Claim
221 words
A translator for use in a switching system wherein called number digits are translated into equipment number digits, the equipment numbers comprising a uniform number of digits while the called numbers comprise a variable number of digits, the translator comprising a plurality of three input terminal code gates, post translator means connected to said code gates for generating first ones of the equipment number digits, means having first code points selectively connected to a first two of said input terminals of said code gates for pretranslating first ones of said called number digits into first coincident signals and associating said first coincident signals with first code points, means having second code points selectively connected to third input terminals of certain of said code gates for pretranslating third digits of four digit called numbers into second coincident signals and associating said second coincident signals with said second code points, means including a common code point selectively connected to third terminals of other of said code gates for generating further second coincident signals for called numbers of only three digits and associating said further second coincident signals with said common code point, and means responsive to the number of digits of the called numbers for selectively controlling the pretranslation of said second coincident signals and the generation of said further second coincident signals.
Claim 14
Dependent Claim
29 words
A translator in accordance with claim 8 further comprising means for utilizing a last one of the called number digits as a last one of the equipment number digits.
Claim 15
Dependent Claim
55 words
A translator in accordance with claim 8 wherein said means for selectively controlling the pretranslation of said second coincident signals and the generation of said further second coincident signals include first logic means for enabling said second code points, and second logic means for selectively enabling said first logic means and said common code point.
Claim 16
Dependent Claim
216 words
In a translator for a switching system wherein three and four digit codes may be stored in a register means for translation and wherein translated three digit codes are applied to control means, the combination comprising a plurality of three terminal code gates, post translator means connected to said code gates for generating the first two digits of the translated codes, first means for connecting the first two terminals of said code gates to the register means for the first two digits of the codes to be translated, second means for connecting the third terminal of certain of said code gates to the register means for the third digit of four digit codes to be translated and including a common code point connected to the third terminals of others of said code gates for three digit codes to be translated, third means connected to the register means for selectively applying the third digit of three digit codes and the fourth digit of four digit codes directly to the control means, and fourth means responsive to the presence of three digit and four digit codes in the register means for selectively enabling said third means and for causing said second means to selectively enable said third terminal of said certtian code gates and said common code point.
Claim 17
Dependent Claim
216 words
In a translator for a switching system wherein three and four digit codes may be stored in a register means for translation and wherein translated three digit codes are applied to control means, the combination comprising a plurality of three terminal code gates, post translator means connected to said code gates for generating the first two digits of the translated codes, first means for connecting the first two terminals of said code gates to the register means for the first two digits of the codes to be translated, second means for connecting the third terminal of certain of said code gates to the register means for the third digit of four digit codes to be translated and including a common code point connected to the third terminals of others of said code gates for three digit codes to be translated, third means connected to the register means for selectively applying the third digit of three digit codes and the fourth digit of four digit codes directly to the control means, and fourth means responsive to the presence of three digit and four digit codes in the register means for selectively enabling said third means and for causing said second means to selectively enable said third terminal of said certtian code gates and said common code point.
Claim 18
Dependent Claim
58 words
In a translator, the combinatioN in accordance with claim 11 wherein said second means includes a plurality of first gate means connected to the register means for the third digit stored in the register means, and wherein said fourth means includes logic means for enabling the first gate means of said second means and said common code point.
Claim 19
Dependent Claim
70 words
In a translator, the combination in accordance with claim 12 wherein said third means includes a plurality of second gate means connected to the register means for the third digit stored in the register means and a plurality of third gate means connected to the register means for the fourth digit stored in the register means and said fourth means includes means for controlling said second and third gate means.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-02-13 | 1976-08-14 | 1977-02-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-02-13 | 1980-08-14 | 1981-02-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-02-13 | 1984-08-14 | 1985-02-13 | $7700.00 | Window Closed / Lapsed |