US3715728A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Simulation timing control system
Assignee: International Standard Electric Corp
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Filing: 1970-07-10
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Granted: 1973-02-06
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Expires: 1990-07-10
Abstract
Abstract The simulation of real time program within computer systems such as telephone switching systems is accomplished by performing the program under the control of a timing clock without direct relation to the real time. A timing indicator is used to follow the progress of the program, the indicator being settable to control the duration of the test programs.
Inventors
- 👤 B Fontaine
- 👤 A Gabriel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 22:23
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/3698; G06F11/22; G06F11/26; G06F11/261; G06F11/362; G06F11/3648; G06F30/00; G06F30/20; H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/54; H04Q3/545; H04Q3/54575; H04Q3/54591; G06F2119/00; G06F2119/12; G06F30/30
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
221 words
A simulation network for checking a test computer containing a real time program to be controlled, a simulation computer programmed to simulate peripheral units connectable to said test computer, the invention comprising a simulation control unit for connection to the simulation computer, a real time clock connected to control the operation of said test computer and a timing clock connected to control the operation of said simulation computer, switching means operable to disconnect the clock input of the test computer from the real time clock and for connecting clock input of the test computer to said simulation control circuit, further circuit means for actuating said simulation control circuit to transmit signals from said timing clock to said test computer, to operate said test computer in response to said timing signals, control means responsive to a signal from the simulation computer for enabling said simulation control circuit to control the transmission of signals from said simulation computer to said test computer without regard to real time, a counter connected to said timing clock to count timing clock signals transmitted to the test computer, further control means for enabling the simulation computer to control the position of the counter, and means for reading the position of this counter, whereby the simulation computer can keep track of the passage of the timing clock time.
Claim 2
Dependent Claim
221 words
A simulation network for checking a test computer containing a real time program to be controlled, a simulation computer programmed to simulate peripheral units connectable to said test computer, the invention comprising a simulation control unit for connection to the simulation computer, a real time clock connected to control the operation of said test computer and a timing clock connected to control the operation of said simulation computer, switching means operable to disconnect the clock input of the test computer from the real time clock and for connecting clock input of the test computer to said simulation control circuit, further circuit means for actuating said simulation control circuit to transmit signals from said timing clock to said test computer, to operate said test computer in response to said timing signals, control means responsive to a signal from the simulation computer for enabling said simulation control circuit to control the transmission of signals from said simulation computer to said test computer without regard to real time, a counter connected to said timing clock to count timing clock signals transmitted to the test computer, further control means for enabling the simulation computer to control the position of the counter, and means for reading the position of this counter, whereby the simulation computer can keep track of the passage of the timing clock time.
Claim 3
Dependent Claim
221 words
A simulation network for checking a test computer containing a real time program to be controlled, a simulation computer programmed to simulate peripheral units connectable to said test computer, the invention comprising a simulation control unit for connection to the simulation computer, a real time clock connected to control the operation of said test computer and a timing clock connected to control the operation of said simulation computer, switching means operable to disconnect the clock input of the test computer from the real time clock and for connecting clock input of the test computer to said simulation control circuit, further circuit means for actuating said simulation control circuit to transmit signals from said timing clock to said test computer, to operate said test computer in response to said timing signals, control means responsive to a signal from the simulation computer for enabling said simulation control circuit to control the transmission of signals from said simulation computer to said test computer without regard to real time, a counter connected to said timing clock to count timing clock signals transmitted to the test computer, further control means for enabling the simulation computer to control the position of the counter, and means for reading the position of this counter, whereby the simulation computer can keep track of the passage of the timing clock time.
Claim 4
Dependent Claim
221 words
A simulation network for checking a test computer containing a real time program to be controlled, a simulation computer programmed to simulate peripheral units connectable to said test computer, the invention comprising a simulation control unit for connection to the simulation computer, a real time clock connected to control the operation of said test computer and a timing clock connected to control the operation of said simulation computer, switching means operable to disconnect the clock input of the test computer from the real time clock and for connecting clock input of the test computer to said simulation control circuit, further circuit means for actuating said simulation control circuit to transmit signals from said timing clock to said test computer, to operate said test computer in response to said timing signals, control means responsive to a signal from the simulation computer for enabling said simulation control circuit to control the transmission of signals from said simulation computer to said test computer without regard to real time, a counter connected to said timing clock to count timing clock signals transmitted to the test computer, further control means for enabling the simulation computer to control the position of the counter, and means for reading the position of this counter, whereby the simulation computer can keep track of the passage of the timing clock time.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-02-06 | 1976-08-07 | 1977-02-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-02-06 | 1980-08-07 | 1981-02-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-02-06 | 1984-08-07 | 1985-02-06 | $7700.00 | Window Closed / Lapsed |