US3713113A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High speed pattern mass memory device
Assignee: Takachiho Koheki KK
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Filing: 1972-03-13
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Granted: 1973-01-23
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Expires: 1992-03-13
Abstract
Abstract A high speed pattern mass memory device for selecting and reading out any of character pattern information for printing or display from a mass information source including a number of different character patterns, in which all the handled character patterns are provided in a sequential-access mass-memory of low price while a rewritable random-access memory having an appropriate small memory capacity is provided as a second pattern memory connected to output so that the number of handled pattern information blocks different from one another is effectively increased in comparison with the small memory capacity of said random-access memory by transferring only different character patterns from the sequencial-access mass-memory to the randomaccess mass memory in response to reference code units of an input data signal. The character patterns in the random-access memory are read out at a time by regenerating a train of the input data signal. Character patterns each having a high frequency in use may be fixedly stored in the random-access memory while only remainder character patterns other than the fixed character pattern are provided in the sequential-access mass memory and read out after temporarily storing to rewritable memory zones of the random-access memory.
Inventors
- 👤 S Kohzuma
- 👤 S Hasuo
- 👤 K Tada
- 👤 T Itoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 15:00
CPC Classifications
G; G09; G09G; G09G1/00; G09G1/06
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
335 words
A high speed pattern mass-memory device, comprising: a sequential-access pattern mass-memory for storing a plurality of different pattern information blocks each having a corresponding reference code unit, at least one random-access pattern memory for storing a plurality of different pattern information blocks the number of which is sufficiently smaller than the number of the different pattern information blocks of said sequential-access pattern mass-memory, input means for receiving an input data signal formed by a train of reference code units, compairson means coupled to the input means for detecting only different reference code units from said reference code units of the input data signal, said receiving of the input data signal being stopped when the number of said different reference code units reaches a predetermined number less than the number of memory zones in said random-access pattern memory, regeneration means coupled to said input means for regenerating said stopped input data signal, a reference code memory coupled to said comparison means for storing said different reference code units, pattern write-in control means coupled to said sequential-access pattern mass-memory, said comparison means and said reference code memory for reading out pattern information blocks corresponding to said different reference code units of said reference code memory from said sequential-access mass-memory and for writing-in said read-out pattern information blocks to said random-access pattern memory, and pattern read-out control means, coupled to said sequentialaccess pattern mass-memory, said random-access pattern memory, said comparison means, said regeneration means, said reference code memory and said pattern write-in conTrol means, for temporarily storing address numbers corresponding to said reference code units of said stopped input data signal in accordance with established mutual relationship between said different reference code units of said reference code memory and address numbers of said pattern information blocks of said random access memory, and for reading out at a time pattern information blocks corresponding to said reference code units of said input data signal from said random access pattern memory in the order of arrangement of said stored address numbers.
Claim 2
Dependent Claim
335 words
A high speed pattern mass-memory device, comprising: a sequential-access pattern mass-memory for storing a plurality of different pattern information blocks each having a corresponding reference code unit, at least one random-access pattern memory for storing a plurality of different pattern information blocks the number of which is sufficiently smaller than the number of the different pattern information blocks of said sequential-access pattern mass-memory, input means for receiving an input data signal formed by a train of reference code units, compairson means coupled to the input means for detecting only different reference code units from said reference code units of the input data signal, said receiving of the input data signal being stopped when the number of said different reference code units reaches a predetermined number less than the number of memory zones in said random-access pattern memory, regeneration means coupled to said input means for regenerating said stopped input data signal, a reference code memory coupled to said comparison means for storing said different reference code units, pattern write-in control means coupled to said sequential-access pattern mass-memory, said comparison means and said reference code memory for reading out pattern information blocks corresponding to said different reference code units of said reference code memory from said sequential-access mass-memory and for writing-in said read-out pattern information blocks to said random-access pattern memory, and pattern read-out control means, coupled to said sequentialaccess pattern mass-memory, said random-access pattern memory, said comparison means, said regeneration means, said reference code memory and said pattern write-in conTrol means, for temporarily storing address numbers corresponding to said reference code units of said stopped input data signal in accordance with established mutual relationship between said different reference code units of said reference code memory and address numbers of said pattern information blocks of said random access memory, and for reading out at a time pattern information blocks corresponding to said reference code units of said input data signal from said random access pattern memory in the order of arrangement of said stored address numbers.
Claim 3
Dependent Claim
125 words
A high speed pattern mass-memory device according to claim 1, in which said random-access pattern memory comprises rewritable memory zones and fixed memory zones employed for fixedly storing fixed pattern information blocks each having a high frequency in use, and further comprising means coupled to said input means and said comparison means for deriving only reference code units corresponding to said pattern information blocks other than said fixed pattern information blocks and for applying said derived reference code units to said comparison means, and means coupled to said regeneration means and said pattern read-out means for directly employing reference code units of said input data signal corresponding to said fixed pattern information blocks as said address numbers used for reading-out said fixed pattern information blocks.
References Cited (Backward Citations)
US3416145A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-01-23 | 1976-07-24 | 1977-01-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-01-23 | 1980-07-24 | 1981-01-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-01-23 | 1984-07-24 | 1985-01-23 | $7700.00 | Window Closed / Lapsed |