US3708360A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Self-aligned gate field effect transistor with schottky barrier drain and source
Assignee: Texas Instruments Inc
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Filing: 1970-06-09
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Granted: 1973-01-02
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Expires: 1990-06-09
Abstract
Abstract A LOW PARASITIC CAPACITANCE FIELD EFFECT TRANSISTOR IS FABRICATED BY THE UTILIZATION OF A SELF-ALIGNING GATE TECHNIQUE. A METAL GATE IS FORMED AND THEN, EMPLOYING THE GATE AS A MASK, LOW TEMPERATURE SCHOTTKY BARRIER SOURCE AND DRAIN JUNCTIONS ARE FORMED. THE TECHNIQUE IS PARTICULARLY USEFUL IN THE FABRICATION OF THE FIELD EFFECT TRNASISTOR AS AN ELEMENT OF A LARGE INTEGRATED CIRCUIT WHERE MANY SUCH ALIGNMENTS MUST BE MADE SIMULTANTEOUSLY. D R A W I N G
Inventors
- 👤 R Wakefield
- 👤 J Cunningham
- 👤 M Hswe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 05:03
CPC Classifications
H; H10; H10D; H10D99/00; H10D48/00; H10D48/30; H10D48/32; H10D48/36; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/053; Y10S148/139
Claims Analysis
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References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-01-02 | 1976-07-03 | 1977-01-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-01-02 | 1980-07-03 | 1981-01-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-01-02 | 1984-07-03 | 1985-01-02 | $7700.00 | Window Closed / Lapsed |