US3705332A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electrical circuit packaging structure and method of fabrication thereof
Assignee: Contel Federal Systems Inc
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Filing: 1970-06-25
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Granted: 1972-12-05
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Expires: 1990-06-25
Abstract
Abstract An electrical circuit packaging structure and method of fabrication thereof. The packaging structure is comprised of one or more batch fabricated electrically conductive wafers stacked together under pressure to form a parallelpiped structure containing one or more active components (e.g., integrated circuit chips) as well as conductor means providing coaxial interconnections in X-, Y-, and Z-axis directions. A stack is normally comprised of conductive wafers of different types including component wafers, interconnection wafers, and connector wafers. Z-axis interconnections, i.e., through-connections in a wafer, are formed by slugs contained within the wafer profile extending between the top and bottom wafer surfaces. Each slug is surrounded by dielectric material which supports the slug and electrically isolates it from the remainder of the wafer material. X-Y axis interconnections are formed by conductors also contained within the wafer profile and surrounded by dielectric material providing support and electrical isolation. The Z-axis slugs and X-Y axis conductors are preferably formed in a wafer by selective chemical etching of the wafer from opposite surfaces thereof. The removed wafer material is replaced with dielectric material to physically support and electrically isolate the slug or conductor from the remaining wafer material.
Inventors
- 👤 Howard L Parks
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 01:32
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W90/00; H10W90/401; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
99 words
An electrical circuit structure including: a first wafer comprised of electrically conductive material and having first and second substantially parallel surfaces; an opening extending through said first wafer between said first and second surfaces thereof; dielectric material disposed in said opening; an island comprised of electrically conductive material identical to said first wafer material disposed within said opening supported by and electrically insulated from said first wafer by said dielectric material; said first wafer having fingers resiliently extending therefrom; a housing; and means mounting said first wafer in said housing with the fingers thereof in contact with said housing.
Claim 2
Dependent Claim
99 words
An electrical circuit structure including: a first wafer comprised of electrically conductive material and having first and second substantially parallel surfaces; an opening extending through said first wafer between said first and second surfaces thereof; dielectric material disposed in said opening; an island comprised of electrically conductive material identical to said first wafer material disposed within said opening supported by and electrically insulated from said first wafer by said dielectric material; said first wafer having fingers resiliently extending therefrom; a housing; and means mounting said first wafer in said housing with the fingers thereof in contact with said housing.
Claim 3
Dependent Claim
214 words
An electronic circuit package comprising: a stack comprised of a plurality of flat solid wafers each having top and bottom surfaces and each formed of electrically conductive material; each of said wafers having at least one opening formed therein extending between the top and bottom surfaces thereof; a solid segment of electrically conductive material disposed within each of said openings spaced from the walls thereof, each of said segments terminating substantially coplanar with at least one of the surfaces of the wafer within which that segment is disposed; each wafer including at least one segment disposed in alignment with a segment in an adjacent wafer, said aligned segments terminating substantially coplanar with opposed surfaces of said wafer and adjacent wafer, respectively; dielectric material disposed in each of said openings adhered to the walls thereof and the segment of conductive material therein for supporting said segment with respect to the wafer and providing electrical insulation therebetween; a circuit component supported on the top surface of a first of said wafers in said stack; said circuit component having at least one lead electrically connected to a segment in said first wafer; and a second of said wafers in said stack being adjacent to said first wafer and having a hole into which said circuit component projects.
Claim 4
Dependent Claim
214 words
An electronic circuit package comprising: a stack comprised of a plurality of flat solid wafers each having top and bottom surfaces and each formed of electrically conductive material; each of said wafers having at least one opening formed therein extending between the top and bottom surfaces thereof; a solid segment of electrically conductive material disposed within each of said openings spaced from the walls thereof, each of said segments terminating substantially coplanar with at least one of the surfaces of the wafer within which that segment is disposed; each wafer including at least one segment disposed in alignment with a segment in an adjacent wafer, said aligned segments terminating substantially coplanar with opposed surfaces of said wafer and adjacent wafer, respectively; dielectric material disposed in each of said openings adhered to the walls thereof and the segment of conductive material therein for supporting said segment with respect to the wafer and providing electrical insulation therebetween; a circuit component supported on the top surface of a first of said wafers in said stack; said circuit component having at least one lead electrically connected to a segment in said first wafer; and a second of said wafers in said stack being adjacent to said first wafer and having a hole into which said circuit component projects.
Claim 5
Dependent Claim
119 words
A connector means suitable for use in a multilevel circuit structure for providing shielding in an X-Y plane and coaxial through-plane connections extending in a Z-axis direction, said connector means comprising: a flat solid wafer, formed at electrically conductive material, having top and bottom surfaces; a uniform pattern of openings formed in said wafer extending between the top and bottom surfaces thereof; a solid slug formed of conductive material disposed in each of said openings spaced from the walls thereof and terminating coplanar with said wafer top and bottom surfaces; and dielectric material disposed in each of said openings adhered to the opening walls and the slug therein for supporting said slug and electrically insulating it from said wafer.
Claim 6
Dependent Claim
119 words
A connector means suitable for use in a multilevel circuit structure for providing shielding in an X-Y plane and coaxial through-plane connections extending in a Z-axis direction, said connector means comprising: a flat solid wafer, formed at electrically conductive material, having top and bottom surfaces; a uniform pattern of openings formed in said wafer extending between the top and bottom surfaces thereof; a solid slug formed of conductive material disposed in each of said openings spaced from the walls thereof and terminating coplanar with said wafer top and bottom surfaces; and dielectric material disposed in each of said openings adhered to the opening walls and the slug therein for supporting said slug and electrically insulating it from said wafer.
Claim 7
Dependent Claim
32 words
The connector means of claim 3 including first and second contacts, formed of electrically conductive material more maleable than said slug material, connected to the opposite ends of each of said slugs.
Claim 8
Dependent Claim
33 words
The connector means of claim 3 including first and second groups of contacts, formed of electrically conductive material more maleable than said wafer material, respectively connected to said wafer top and bottom surfaces.
Claim 9
Dependent Claim
22 words
The connector means of claim 3 including fingers formed of good heat conductive material resiliently extending from the periphery of said wafer.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-12-05 | 1976-06-05 | 1976-12-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-12-05 | 1980-06-05 | 1980-12-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-12-05 | 1984-06-05 | 1984-12-05 | $7700.00 | Window Closed / Lapsed |