US3702990A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Variable threshold memory system using minimum amplitude signals
Assignee: RCA Corp
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Filing: 1971-02-02
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Granted: 1972-11-14
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Expires: 1991-02-02
Abstract
Abstract Selected devices of an MNOS array are placed in one threshold state by placing their gate electrodes at a first voltage level and their source and drain electrodes and their semiconductor substrate at a second voltage level. Selected devices are placed in a second threshold state by reversing the above mentioned voltage conditions. In both instances, appropriate voltages are applied to the non-selected devices to prevent them from changing their states. The substrate can be switched to assume various voltage levels.
Inventors
- 👤 Edward Charles Ross
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 02:37
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/353; G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0466; H03K2217/00; H03K2217/0018
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
424 words
The combination comprising: an array of field-effect devices arranged in columns and rows; each device having a control electrode, a first and a second electrode defining a conduction path and having a substrate region between said first and second electrodes, and each device of the type capable of assuming two threshold levels, each row of the array comprising a first bit line to which the first electrode of all devices in the row are connected and a second bit line to which the second electrode of all devices in the row are connected and each column of the array comprising a single word line to which the control electrode of all devices in that column are connected; connections for first and second voltages, the difference in potential between said voltages being greater than a given reference value; a plurality of switch means, equal to the number of bit lines plus the number of word lines, one switch means connected to each line, each switch means for selectively connecting its line to the connection for the first voltage or the connection for the second voltage; means connecting the substrates of all of said devices in common at a substrate terminal; a substrate switch means connected to said substrate terminal for selectively connecting said substrate terminal to the connection for the first voltage or the connection for the second voltage; means for setting the threshold level of a device to one of said two threshold levels, including means for operating the switch means for applying to each bit line, to said substrate terminal, and to non-selected word lines the same one of said first and second voltages, and for concurrently applying to selected word lines the other one of said first and second voltages, the relative polarity of said voltages being in a direction to inhibit conduction of the devices; and means for setting, a column at a time, selected ones of said devices to the other one of said two threshold levels, including means for operating the switch means associated with the two bit lines of tHe selected devices and the substrate terminal to apply to said two bit lines and the substrate terminal said other one of said first and second voltages, and for operating the switch means associated with the word lines of the selected transistors and the two bit lines of the nonselected transistors to apply thereto said one of said first and second voltages, the relative polarity of said voltages being in a direction to enhance conduction of the selected transistors.
Claim 2
Dependent Claim
424 words
The combination comprising: an array of field-effect devices arranged in columns and rows; each device having a control electrode, a first and a second electrode defining a conduction path and having a substrate region between said first and second electrodes, and each device of the type capable of assuming two threshold levels, each row of the array comprising a first bit line to which the first electrode of all devices in the row are connected and a second bit line to which the second electrode of all devices in the row are connected and each column of the array comprising a single word line to which the control electrode of all devices in that column are connected; connections for first and second voltages, the difference in potential between said voltages being greater than a given reference value; a plurality of switch means, equal to the number of bit lines plus the number of word lines, one switch means connected to each line, each switch means for selectively connecting its line to the connection for the first voltage or the connection for the second voltage; means connecting the substrates of all of said devices in common at a substrate terminal; a substrate switch means connected to said substrate terminal for selectively connecting said substrate terminal to the connection for the first voltage or the connection for the second voltage; means for setting the threshold level of a device to one of said two threshold levels, including means for operating the switch means for applying to each bit line, to said substrate terminal, and to non-selected word lines the same one of said first and second voltages, and for concurrently applying to selected word lines the other one of said first and second voltages, the relative polarity of said voltages being in a direction to inhibit conduction of the devices; and means for setting, a column at a time, selected ones of said devices to the other one of said two threshold levels, including means for operating the switch means associated with the two bit lines of tHe selected devices and the substrate terminal to apply to said two bit lines and the substrate terminal said other one of said first and second voltages, and for operating the switch means associated with the word lines of the selected transistors and the two bit lines of the nonselected transistors to apply thereto said one of said first and second voltages, the relative polarity of said voltages being in a direction to enhance conduction of the selected transistors.
Claim 3
Dependent Claim
205 words
In combination: an array of metal-nitride-oxide semiconductor (MNOS) memory devices arranged in columns and rows and formed on a semiconductor substrate, each device having a conduction path and a gate electrode; a plurality of column conductors, each column conductor connected to the gate electrodes of all devices in that column; a plurality of pairs of row conductors, each pair connected across the conduction paths of all devices in its row; means for placing the devices in a selected column in one state comprising means for placing the substrate and all of the row conductors at a first potential and means for placing the conductor for that column at a reference potential, the potential difference between said first and reference potentials being greater than a given reference value and being of a polarity to inhibit conduction through the devices in that column; and means for changing the state of a device, in a selected column and in a selected row to a second state, comprising means for applying to that column conductor and to the row conductors of the non-selected rows said first potential and means for placing the substrate, the pair of conductors in the selected rows, and the non-selected columns at said reference potential.
Claim 4
Dependent Claim
205 words
In combination: an array of metal-nitride-oxide semiconductor (MNOS) memory devices arranged in columns and rows and formed on a semiconductor substrate, each device having a conduction path and a gate electrode; a plurality of column conductors, each column conductor connected to the gate electrodes of all devices in that column; a plurality of pairs of row conductors, each pair connected across the conduction paths of all devices in its row; means for placing the devices in a selected column in one state comprising means for placing the substrate and all of the row conductors at a first potential and means for placing the conductor for that column at a reference potential, the potential difference between said first and reference potentials being greater than a given reference value and being of a polarity to inhibit conduction through the devices in that column; and means for changing the state of a device, in a selected column and in a selected row to a second state, comprising means for applying to that column conductor and to the row conductors of the non-selected rows said first potential and means for placing the substrate, the pair of conductors in the selected rows, and the non-selected columns at said reference potential.
Claim 5
Dependent Claim
398 words
The combination comprising: an array of field-effect devices, arranged in columns and rows and formed on a semiconductor substrate, each device having a control electrode and first and second electrodes defining a conduction path, and each device of the type capable of assuming two threshold levels, each row of the array comprising a first bit line to which the first electrode of all devices in the row are connected and a second bit line to which the second electrode of all devices in the row are connected and each column of the array comprising a single word line to which the control electrode of all devices in that column are connected; connections for first and second voltages, the difference in potential between said voltages being greater than a given reference value; a plurality of switch means, equal to the number of bit lines plus the number of word lines, one switch means connected to each line, each switch means for selectively connecting its line to the connection for the first voltage or the connection for the second voltage; a substrate switch means connected to said substrate for selectively connecting said substrate to the connection for the first voltage or the connection for the second voltage; means for setting the threshold level of a device to one of said two threshold levels, including means for operating the switch means for applying to each bit line, to said substrate, and to non-selected word lines the same one of said first and second voltages, and for concurrently applying to selected word lines the other one of said first and second voltages, the relative polarity of said voltages being in a direction to inhibit conduction of the devices; and means for setting, a column at a time, selected ones of said devices to the other one of said two threshold levels, including means for operating the switch means associated with the two bit lines of the selected devices and the substrate to apply to said two bit lines and the substrate said other one of said first and second voltages, and for operating the switch means associated with the word lines of the selected transistors and the two bit lines of the non-selected transistors to apply thereto said one of said first and second voltages, the relative pOlarity of said voltages being in a direction to enhance conduction of the selected transistors.
Claim 6
Dependent Claim
398 words
The combination comprising: an array of field-effect devices, arranged in columns and rows and formed on a semiconductor substrate, each device having a control electrode and first and second electrodes defining a conduction path, and each device of the type capable of assuming two threshold levels, each row of the array comprising a first bit line to which the first electrode of all devices in the row are connected and a second bit line to which the second electrode of all devices in the row are connected and each column of the array comprising a single word line to which the control electrode of all devices in that column are connected; connections for first and second voltages, the difference in potential between said voltages being greater than a given reference value; a plurality of switch means, equal to the number of bit lines plus the number of word lines, one switch means connected to each line, each switch means for selectively connecting its line to the connection for the first voltage or the connection for the second voltage; a substrate switch means connected to said substrate for selectively connecting said substrate to the connection for the first voltage or the connection for the second voltage; means for setting the threshold level of a device to one of said two threshold levels, including means for operating the switch means for applying to each bit line, to said substrate, and to non-selected word lines the same one of said first and second voltages, and for concurrently applying to selected word lines the other one of said first and second voltages, the relative polarity of said voltages being in a direction to inhibit conduction of the devices; and means for setting, a column at a time, selected ones of said devices to the other one of said two threshold levels, including means for operating the switch means associated with the two bit lines of the selected devices and the substrate to apply to said two bit lines and the substrate said other one of said first and second voltages, and for operating the switch means associated with the word lines of the selected transistors and the two bit lines of the non-selected transistors to apply thereto said one of said first and second voltages, the relative pOlarity of said voltages being in a direction to enhance conduction of the selected transistors.
Claim 7
Dependent Claim
17 words
The combination as claimed in claim 3 wherein each switch means comprises a single-pole, double-throw switch means.
Claim 8
Dependent Claim
18 words
The combination as claimed in claim 3 wherein each one of said devices consists of a single transistor.
Claim 9
Dependent Claim
21 words
The combination as claimed in claim 3 wherein each one of said switch means includes at least one insulated-gate field-effect transistor.
Claim 10
Dependent Claim
22 words
The combination as claimed in claim 6 wherein said switch means transistors are of the same conductivity type as said array devices.
Claim 11
Dependent Claim
18 words
The combination as claimed in claim 7 wherein said array devices are metal-nitride-oxide-silicon (MNOS) transistors of P-type conductivity.
Claim 12
Dependent Claim
19 words
The combination as claimed in claim 7 wherein said one of said first and second voltages is ground potential.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-11-14 | 1976-05-15 | 1976-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-11-14 | 1980-05-15 | 1980-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-11-14 | 1984-05-15 | 1984-11-14 | $7700.00 | Window Closed / Lapsed |