US3702955A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiple emitter transistor apparatus
Assignee: National Semiconductor Corp
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Filing: 1969-07-11
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Granted: 1972-11-14
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Expires: 1989-07-11
Abstract
Abstract A non-gold doped multiple emitter transistor device having an additional lateral PNP transistor formed in the collector region and a debiasing resistance formed in the base region, these elements cooperating to suppress the inherent PNP beta to substrate characteristic and control the inverse Hfe of the device. The emitter of the additional transistor is connected to the base of the MET through a pinch-type debiasing resistor formed in a projection of the base region of the MET, and the base and collector of the additional transistor are shorted together and connected to the collector of the MET so as to provide a shunt path around the base-collector junction thereof.
Inventors
- 👤 Jeffrey C Kalb
- 👤 Robert J Widlar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:17
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/60; H10D84/63; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/088; H10D84/611; Y; Y10; Y10S; Y10S148/00; Y10S148/037; Y10S148/085
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
220 words
An integrated circuit transistor device, comprising: a body of semiconductive material; a first region of a first conductivity type formed in said body and terminating in a first surface of said body; a second region of a second conductivity type formed in said body contiguous with and surrounding said first region and terminating in said first surface; a third region of said second conductivity type formed in said first region and terminating in said first surface, said third region having a first portion and a second portion; a fourth region of said first conductivity type formed in said first portion of said third region and terminating in said first surface; a fifth region of said second conductivity type formed in said first region in spaced apart relationship with said second portion of said third region and terminating in said first surface; a sixth region of said first conductivity type formed in said third region along a line defining said first and second portions, said sixth region extending into said first region on either side of said third region and terminating in said first surface, a first interconnect ohmically contacting said second portion of said third region; a second interconnect ohmically contacting said fourth region; and a third interconnect ohmically contacting said first region, said fifth region and said sixth region.
Claim 2
Dependent Claim
220 words
An integrated circuit transistor device, comprising: a body of semiconductive material; a first region of a first conductivity type formed in said body and terminating in a first surface of said body; a second region of a second conductivity type formed in said body contiguous with and surrounding said first region and terminating in said first surface; a third region of said second conductivity type formed in said first region and terminating in said first surface, said third region having a first portion and a second portion; a fourth region of said first conductivity type formed in said first portion of said third region and terminating in said first surface; a fifth region of said second conductivity type formed in said first region in spaced apart relationship with said second portion of said third region and terminating in said first surface; a sixth region of said first conductivity type formed in said third region along a line defining said first and second portions, said sixth region extending into said first region on either side of said third region and terminating in said first surface, a first interconnect ohmically contacting said second portion of said third region; a second interconnect ohmically contacting said fourth region; and a third interconnect ohmically contacting said first region, said fifth region and said sixth region.
Claim 3
Dependent Claim
42 words
An integrated circuit transistor device as recited in claim 1 wherein said sixth region substantially reduces the cross-sectional area of said third region lying therebeneath thereby providing an impedance to current flow between said first and second portioNs of said third region.
Claim 4
Dependent Claim
31 words
An integrated circuit transistor device as recited in claim 1 wherein said fifth region and said sixth region intersect to form a ring enclosing said second portion of said third region.
References Cited (Backward Citations)
US3283170A
Cited
US3233125A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-11-14 | 1976-05-15 | 1976-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-11-14 | 1980-05-15 | 1980-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-11-14 | 1984-05-15 | 1984-11-14 | $7700.00 | Window Closed / Lapsed |