Field-effect transistor circuit for detecting changes in voltage level

Claim 2

A circuit for detecting a small change in voltage level comprising, in combination; first and second devices interconnected so that the voltage produced by one, whose value is a function of its threshold voltage level, controls the conductivity of the second; means normally maintainIng the threshold voltage level of one of said devices higher than that of the other; and means responsive to a voltage to be detected for concurrently decreasing the higher threshold voltage level of the one device while increasing the lower threshold voltage level of the other device.

Claim 3

A circuit as set forth in claim 1 wherein each device comprises a transistor.

Claim 4

A circuit as set forth in claim 1 wherein each device comprises a field-effect transistor.

Claim 5

A circuit as set forth in claim 3 wherein said means normally maintaining the threshold voltage level of one of said devices higher than that of the other comprises means normally reverse biasing the source to substrate of said one device.

Claim 6

A circuit as set forth in claim 1 wherein each device comprises a field-effect transistor having source, gate and drain electrodes and a substrate, said first device being connected gate to drain and to the gate of the second transistor and the substrate of said first device being connected to the source of said second device; said means normally maintaining the threshold voltage level of one of said devices higher than that of the other comprising biasing means for reverse biasing for applying a reverse bias between the source electrode and substrate of said first device; and said means responsive to a voltage to be detected comprising means for applying a signal in one sense between the substrate and source electrode of the first transistor and in the opposite sense between the substrate and source electrode of the second transistor.

Claim 7

A circuit for detecting a small change in voltage level comprising, in combination; normally conducting first and second field-effect transistors interconnected so that a voltage developed by the first whose value is a function of its source-to-substrate bias, controls the conductivity of the second; means normally reverse biasing the first transistor source-to-substrate; and means applying the voltage to be detected to both transistors in a sense to reduce the source-to-substrate bias on the first and to reverse bias the source-to-substrate of the second.

Claim 8

A circuit for detecting a small change in voltage level comprising, in combination; normally conducting first and second field-effect transistors interconnected so that a voltage developed by the first whose value is a function of its source-to-substrate bias, controls the conductivity of the second; means normally reverse biasing the first transistor source-to-substrate; and means applying the voltage to be detected to both transistors in a sense to reduce the source-to-substrate bias on the first and to reverse bias the source-to-substrate of the second.

Claim 9

The combination comprising: first and second transistors, each transistor having a substrate, source and drain electrodes defining the ends of a conduction path within its substrate and a gate electrode; means connecting the source of the first transistor and the substrate of the second transistor to a first input point; means connecting the substrate of said first transistor to a second input point and means coupling the source of said second transistor to said second input point; biasing means, including the gate-to-source path of said second transistor, coupled to the gate of said first transistor for applying a potential thereto which is a function of the threshold voltage of said second transistor; and means for applying a signal between said two input points which for one value of signal increases the threshold voltage of said first transistor while concurrently decreasing the threshold voltage of said second transistor and which for another value of signal decreases the threshold voltage of said first transistor while concurrently increasing the threshold voltage of said second transistor.

Claim 10

The combination comprising: first and second transistors, each transistor having a substrate, source and drain electrodes defining the ends of a conduction path within its substrate and a gate electrode; means connecting the source of the first transistor and the substrate of the second transistor to a first input point; means connecting the substrate of said first transistor to a second input point and means coupling the source of said second transistor to said second input point; biasing means, including the gate-to-source path of said second transistor, coupled to the gate of said first transistor for applying a potential thereto which is a function of the threshold voltage of said second transistor; and means for applying a signal between said two input points which for one value of signal increases the threshold voltage of said first transistor while concurrently decreasing the threshold voltage of said second transistor and which for another value of signal decreases the threshold voltage of said first transistor while concurrently increasing the threshold voltage of said second transistor.

Claim 11

The combination as claimed in claim 7 wherein said transistors are insulated-gate field-effect transistors of the same conductivity type.

Claim 12

The combination as claimed in claim 8 wherein said biasing means includes means for direct current connecting the gate and drain of said second transistor to the gate of said first transistor and further includes a source of current connected in series with the source-to-drain path of said second transistor and poled in a direction to bias said second transistor into conduction.

Claim 13

The combination as claimed in claim 9 wherein said means coupling the source of said second transistor to said second input point includes a source of relatively constant potential; and wherEin said source of constant potential is poled in a direction to reverse bias the source of said second transistor with respect to its substrate.

Claim 14

The combination as claimed in claim 10 wherein said source of relatively constant potential includes a diode having one of its anode and cathode coupled to the source of said second transistor and the other of its anode and cathode coupled to said second input point.

Claim 15

The combination as claimed in claim 11 further including a source of operating potential coupled between said second input point and a first power terminal; wherein said source of current is coupled between said first power terminal and the gate and drain of said second transistor; and further including output load means coupled between said first power terminal and the drain of said first transistor.

Claim 16

The combination as claimed in claim 12 wherein said source of current includes a single transistor having its source-drain path connected between said first power terminal and the gate-drain of said second transistor; and wherein said output load means includes a single transistor having its source-drain path connected between said first power terminal and the drain of said first transistor.

Claim 17

The combination comprising: first and second transistors, each transistor having a substrate, source and drain electrodes defining the ends of a conduction path within its substrate, and a gate electrode; biasing means, including the gate-to-source paths of one transistor, coupled to the gate of the other transistor for controlling the conductivity of said other transistor as a function of the threshold voltage of said one transistor; and means for applying a signal to be detected, between the source electrodes and substrates of said transistor, which when of one sense increases the reverse bias between the source and substrate of one transistor and concurrently decreases the reverse bias between the source and substrate of the other transistor whereby the threshold voltage of said one transistor is increased and the threshold voltage of said other transistor is decreased and which when of opposite sense decreases the source-to-substrate reverse bias of said one transistor while concurrently increasing the source-to-substrate reverse bias of said other transistor whereby the threshold voltage of said one transistor is decreased and the threshold voltage of said other transistor is increased.

Claim 18

The combination comprising: first and second transistors, each transistor having a substrate, source and drain electrodes defining the ends of a conduction path within its substrate, and a gate electrode; biasing means, including the gate-to-source paths of one transistor, coupled to the gate of the other transistor for controlling the conductivity of said other transistor as a function of the threshold voltage of said one transistor; and means for applying a signal to be detected, between the source electrodes and substrates of said transistor, which when of one sense increases the reverse bias between the source and substrate of one transistor and concurrently decreases the reverse bias between the source and substrate of the other transistor whereby the threshold voltage of said one transistor is increased and the threshold voltage of said other transistor is decreased and which when of opposite sense decreases the source-to-substrate reverse bias of said one transistor while concurrently increasing the source-to-substrate reverse bias of said other transistor whereby the threshold voltage of said one transistor is decreased and the threshold voltage of said other transistor is increased.