US3702942A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal sampling circuit
Assignee: Bull HN Information Systems Italia SpA
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Filing: 1971-06-29
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Granted: 1972-11-14
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Expires: 1991-06-29
Abstract
Abstract A current-mode amplifier is connected in series with a current source which turns the amplifier on or off in response to signal voltages connected to the current source. The current-mode amplifier samples signals from a source of signals only when the amplifier is turned on. Diodes, connected between a source of signal voltages and the current source, store electrical charges which aid the current source in providing fast turn on and fast turn off so that a high rate of sampling is possible.
Inventors
- 👤 Michael C Aguirre
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 20:05
CPC Classifications
G; G11; G11C; G11C27/00; G11C27/02; G11C27/024; G11C27/026; H; H03; H03F; H03F3/00; H03F3/72; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/0412; H03K17/04126
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
310 words
A signal sampling circuit comprising: first, second, third, fourth, fifth and sixth transistors each having a base, a collector and an emitter; first, second, third and fourth potentials; first, second, third, fourth, fifth and sixth resistors, said first resistor being connected between said first potential and said collector of said first transistor, said second resistor being connected between said first potential and said collector of said second transistor; first and second signal-input terminals, said first input terminal being coupled to said base of said first transistor, said second input terminal being coupled to said collector of said third transistor, said collector of said third transistor being connected to said emitters of said first and said second transistors, said base of said third transistor being coupled to said fourth potential, said third resistor being connected between said second potential and said emitter of said third resistor; a signal-output terminal, said fourth resistor being connected between said output terminal and said collector of said fourth transistor, said base of said second transistor being coupled to said collector of said fourth transistor, said fifth resistor being connected between said first potential and said emitter of said sixth transistor, said sixth resistor being connected between said collector of said sixth transistor and said second potential, said base of said sixth transistor being connected to said collector of said second transistor, said base of said fifth transistor being connected to said collector of said sixth transistor; and a capacitor, said capacitor being connected between said third potential and said output terminal, said base of said fourth transistor being connected to said collector of said first transistor, said emitter of said fourth transistor being connected to said first potential, said collector of said fifth transistor being connected to said collector of said fourth transistor, said emitter of said fifth transistor being connected to said second potential.
Claim 2
Dependent Claim
310 words
A signal sampling circuit comprising: first, second, third, fourth, fifth and sixth transistors each having a base, a collector and an emitter; first, second, third and fourth potentials; first, second, third, fourth, fifth and sixth resistors, said first resistor being connected between said first potential and said collector of said first transistor, said second resistor being connected between said first potential and said collector of said second transistor; first and second signal-input terminals, said first input terminal being coupled to said base of said first transistor, said second input terminal being coupled to said collector of said third transistor, said collector of said third transistor being connected to said emitters of said first and said second transistors, said base of said third transistor being coupled to said fourth potential, said third resistor being connected between said second potential and said emitter of said third resistor; a signal-output terminal, said fourth resistor being connected between said output terminal and said collector of said fourth transistor, said base of said second transistor being coupled to said collector of said fourth transistor, said fifth resistor being connected between said first potential and said emitter of said sixth transistor, said sixth resistor being connected between said collector of said sixth transistor and said second potential, said base of said sixth transistor being connected to said collector of said second transistor, said base of said fifth transistor being connected to said collector of said sixth transistor; and a capacitor, said capacitor being connected between said third potential and said output terminal, said base of said fourth transistor being connected to said collector of said first transistor, said emitter of said fourth transistor being connected to said first potential, said collector of said fifth transistor being connected to said collector of said fourth transistor, said emitter of said fifth transistor being connected to said second potential.
Claim 3
Dependent Claim
29 words
A signal sampling circuit as defined in claim 1 including: diode means, said diode means being connected between said second input terminal and said collector of said third transistor.
References Cited (Backward Citations)
US3309618A
Cited
US3474259A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-11-14 | 1976-05-15 | 1976-11-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-11-14 | 1980-05-15 | 1980-11-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-11-14 | 1984-05-15 | 1984-11-14 | $7700.00 | Window Closed / Lapsed |