US3701973A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Data processing arrangement for processing waiting time commands
Assignee: US Philips Corp
•
Filing: 1970-09-23
•
Granted: 1972-10-31
•
Expires: 1990-09-23
Abstract
Abstract A data processing arrangement for processing waiting time commands comprising a source of clock signals representing real time and waiting time, a memory for recording the real times of termination of waiting time commands, means for providing only one waiting time clock is set at the difference time between the instantaneous real time and the real time of the next termination of the waiting time of a waiting time command whenever a waiting time terminates and also when a new waiting time command occurs.
Inventors
- 👤 Dietrich Von Der Pfordten
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 18:16
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4812; G06F9/4825; G04; G04G; G04G15/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
114 words
A data processing arrangement for processing waiting times, comprising a memory, a clock source applying a real time signal to said memory, a program command register for applying a waiting time command to said memory, said memory determining the real time of termination of said waiting time command by adding the duration of said waiting time command to said real time signal from said clock source, a second clock source, said second clock source responsive to said memory for storing the difference between real time and each successive next occurring instant of waiting time command terminations, said second clock providing a signal to said program command register at the end of one waiting time.
Claim 2
Dependent Claim
114 words
A data processing arrangement for processing waiting times, comprising a memory, a clock source applying a real time signal to said memory, a program command register for applying a waiting time command to said memory, said memory determining the real time of termination of said waiting time command by adding the duration of said waiting time command to said real time signal from said clock source, a second clock source, said second clock source responsive to said memory for storing the difference between real time and each successive next occurring instant of waiting time command terminations, said second clock providing a signal to said program command register at the end of one waiting time.
Claim 3
Dependent Claim
38 words
The combination of claim 1, wherein said second clock source responds to a difference time exceeding the maximum time range of said second clock by reaching a setting equal to said difference time reduced by said maximum time.
Claim 4
Dependent Claim
41 words
The combination of claim 1, wherein said second clock responds to a difference time exceeding the maximum time range of said second clock by a multiple thereof by reaching a setting equal to a reduced difference time corresponding to said multiple.
Claim 5
Independent Claim
305 words
A system for processing waiting time commands comprising a program command register including a waiting time command, a waiting time duration, and information, an adder, a memory, a real time clock, a waiting time clock, a first auxiliary register, a comparator and a subtractor, a first command line coupled to the second auxiliary register for transferring the time of the second command from said memory to said second auxiliary register, a second command line coupled to the first auxiliary register for transferring the time of the third command from said memory to said first auxiliary register, said comparator coupled to said first and second registers for determining the time of the first command, means coupling the output of said comparator to said first auxiliary register for storing said time of said first command in said first register, means applying the next successive waiting time duration from said program command register to said adder, means coupling said real time clock to said adder, said adder adding a real time clock signal to said next successive waiting time duration to provide an output representative of the instant of termination of said next successive waiting time command, means coupling said adder output to said memory, means coupling said next successive waiting time data to said memory for storage with said adder output at a corresponding memory location, means coupling said adder output to said second auxiliary register for comparison with the contents of said first auxiliary register, means applying said comparator output to said subtractor, means applying a real time signal from said real time clock to said subtractor, and means applying the output of said subtractor to said waiting time clock for storing therein the difference time between said real time and the instant of termination of the waiting time command of said next successive waiting time.
Claim 6
Independent Claim
305 words
A system for processing waiting time commands comprising a program command register including a waiting time command, a waiting time duration, and information, an adder, a memory, a real time clock, a waiting time clock, a first auxiliary register, a comparator and a subtractor, a first command line coupled to the second auxiliary register for transferring the time of the second command from said memory to said second auxiliary register, a second command line coupled to the first auxiliary register for transferring the time of the third command from said memory to said first auxiliary register, said comparator coupled to said first and second registers for determining the time of the first command, means coupling the output of said comparator to said first auxiliary register for storing said time of said first command in said first register, means applying the next successive waiting time duration from said program command register to said adder, means coupling said real time clock to said adder, said adder adding a real time clock signal to said next successive waiting time duration to provide an output representative of the instant of termination of said next successive waiting time command, means coupling said adder output to said memory, means coupling said next successive waiting time data to said memory for storage with said adder output at a corresponding memory location, means coupling said adder output to said second auxiliary register for comparison with the contents of said first auxiliary register, means applying said comparator output to said subtractor, means applying a real time signal from said real time clock to said subtractor, and means applying the output of said subtractor to said waiting time clock for storing therein the difference time between said real time and the instant of termination of the waiting time command of said next successive waiting time.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-31 | 1976-05-01 | 1976-10-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-31 | 1980-05-01 | 1980-10-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-31 | 1984-05-01 | 1984-10-31 | $7700.00 | Window Closed / Lapsed |