Crystal controlled digital logic gate oscillator

Claim 2

A signal generator comprising amplifier means having an input terminal and an output terminal, bias means connected across said amplifier means from said input terminal to said output terminal, capacitor means and crystal means arranged in a crystal- pi network connected across said amplifier means from said input terminal to said output terminal, said crystal- pi network exhibiting attenuation which increases with frequency whereby harmonic oscillation is decreased, and output means connected to said input terminal of said amplifier means.

Claim 3

The signal generator recited in claim 1 wherein said amplifier means includes digital logic circuit means, and said bias means includes resistive and reactive impedance means to bias said digital logic circuit means into the linear amplifier operating mode.

Claim 4

The signal generator recited in claim 1 wherein said crystal- pi network includes variable capacitance means.

Claim 5

The signal generator recited in claim 1 including second amplifier means having an input terminal and an output terminal, said input terminal of said second amplifier means connected to said input terminal of said first amplifier means, and second output means connected to said output terminal of said second amplifier means.

Claim 6

The signal generator recited in claim 1 including source means connected to said amplifier means to effect operation thereof and to assure oscillation of said signal generator.

Claim 7

The signal generator recited in claim 4 wherein said first-mentioned output means produces a sine wave output signal, and said second output means produces a square wave output signal.

Claim 8

The signal generator recited in claim 1 wherein said capacitor means includes capacitive means connected to said input and output terminals of said amplifier means to overcome the effect of inherent capacitance values at said input and output terminals.

Claim 9

A signal generator comprising ampliFier means having an input terminal and an output terminal crystal network means connected across said amplifier means from said input terminal to said output terminal, bias means comprising a resistor serially connected to an inductor and connected across said amplifier means from said input terminal to said output terminal, said inductor in said bias means being selected to attenuate AC signals in said bias means and reject high frequency oscillations imposed upon the fundamental output frequency of said signal generator, and output means connected to said input terminal of said amplifier means.

Claim 10

A signal generator comprising ampliFier means having an input terminal and an output terminal crystal network means connected across said amplifier means from said input terminal to said output terminal, bias means comprising a resistor serially connected to an inductor and connected across said amplifier means from said input terminal to said output terminal, said inductor in said bias means being selected to attenuate AC signals in said bias means and reject high frequency oscillations imposed upon the fundamental output frequency of said signal generator, and output means connected to said input terminal of said amplifier means.

Claim 11

The signal generator recited in claim 8 wherein said amplifier means includes digital logic circuit means, and said resistor within said bias means is selected to bias said digital logic circuit means into the linear amplifier operating mode.