US3697950A
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Versatile arithmetic unit for high speed sequential decoder
Assignee: National Aeronautics and Space Administration
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Filing: 1971-02-22
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Granted: 1972-10-10
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Expires: 1991-02-22
Abstract
Abstract An arithmetic unit for a decoder for data encoded by convolution encoding. The arithmetic unit includes two channels, a main metric channel and a delta metric channel. In the main metric channel a metric is computed for a received symbol branch with respect to check bits from an encoder replica which is fed with a data bit, assumed to be a zero. The delta metric channel computes a delta metric for the same branch. At the end of the computations the sign of the computed delta metric is used to control the changing of the data bit to a one and the adding of the computed delta metric to the metric in the main metric channel.
Inventors
- 👤 Warren A Lushbaugh
- 👤 James W Lyland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 08:20
CPC Classifications
H; H04; H04L; H04L1/00; H04L1/004; H04L1/0045; H04L1/0054; H03; H03M; H03M13/00; H03M13/37; H03M13/39
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
131 words
In a decoder for convolutional coded data in which each bit of data is coded by V symbols, the arrangement comprising: a local multistage encoder for sequentially providing V check symbols; first means responsive to said sequentially provided V check symbols and to V quantized coded symbols supplied thereto, for providing a sequence of values; second means for accumulating a metric value as a function of the values provided by said first means; third means for developing a delta metric value as a function of the values provided by said first means; and fourth means for controlling the metric value accumulated by said second means and the state of a first stage of said local encoder as a function of the sign of the delta metric developed by said third means.
Claim 2
Dependent Claim
131 words
In a decoder for convolutional coded data in which each bit of data is coded by V symbols, the arrangement comprising: a local multistage encoder for sequentially providing V check symbols; first means responsive to said sequentially provided V check symbols and to V quantized coded symbols supplied thereto, for providing a sequence of values; second means for accumulating a metric value as a function of the values provided by said first means; third means for developing a delta metric value as a function of the values provided by said first means; and fourth means for controlling the metric value accumulated by said second means and the state of a first stage of said local encoder as a function of the sign of the delta metric developed by said third means.
Claim 3
Dependent Claim
57 words
The arrangement as recited in claim 1 wherein each check symbol is either of a first value or a second value, each quantized coded symbol is one of n quantized values and said first means provides a value which is a function of the quantized value of the coded symbol and the value of the check symbol.
Claim 4
Dependent Claim
96 words
The arrangement as recited in claim 2 wherein said second means includes first storing means for storing a plurality of metric values, and for providing one of said metric values related to the value provided by said first means, said second means further including a first metric register coupled to said first storing means for temporarily storing the value received therefrom, a second metric register and an adder coupled to said first and second metric registers for adding the value temporarily stored in said first metric register to a value stored in said second metric register.
Claim 5
Dependent Claim
105 words
The arrangement as recited in claim 2 wherein said third means includes second storing means for storing a plurality of delta metric values and for providing as an output one of said delta metric values related to the value provided by said first means, said third means further including a first delta metric register coupled to said second storing means for temporarily storing the value received therefrom, a second delta metric register and an adder coupled to said first and second delta metric registers for adding the value temporarily stored in said first delta metric register to the value in said second delta metric register.
Claim 6
Dependent Claim
56 words
The arrangement as recited in claim 4 wherein each check symbol is either of a first value or a second value, each coded symbol is one of n quantized values and said first means provides a value which is a function of the quantized value of the coded symbol and the value of the check symbol.
Claim 7
Dependent Claim
108 words
The arrangement as recited in claim 5 wherein said fourth means connecting said adder of said third means and the second delta metric register to said first metric register for transferring the delta metric value in said second delta metric register to said first metric register and logic means coupled to said second delta metric register and to said second means adder for sensing the sign of the delta metric value in said second delta metric register and for activating, as a function of the value sign, said second means adder to add the value in said first metric register to the value in said second metric register.
Claim 8
Dependent Claim
43 words
The arrangement as recited in claim 6 wherein said fourth means further include means for connecting said logic means to the first stage of said local encoder to control the state thereof as a function of the sign sensed by said logic means.
Claim 9
Independent Claim
232 words
A system for decoding data bits encoded by convolutional coding, comprising: a local multistage encoder for sequentially providing V check symbols; buffer means for storing data bits, each in the form of V quantized symbols; first means coupled to said local encoder and to said buffer means for providing a symbol value as a function of each quantized symbol and a check symbol supplied thereto; metric channel means coupled to said first means for accumulating a metric value as a function of V symbol values received from said first means; delta metric channel means coupled to said first means for providing a delta metric value as a function of V symbol values received from said first means; clock means coupled to said local encoder to said first means, to said metric channel means and to said delta metric channel means for controlling the sequential provision of said V check symbols, the sequential provision of said symbol values and the accumulation of said metric values and said delta metric values during a succession of V clock periods; and control means coupled to said clock means, to said metric channel means and to said delta metric channel means for controlling at the end of said V clock periods the metric value in said metric channel means as a function of the sign of the delta metric value accumulated in said delta metric channel means.
Claim 10
Independent Claim
232 words
A system for decoding data bits encoded by convolutional coding, comprising: a local multistage encoder for sequentially providing V check symbols; buffer means for storing data bits, each in the form of V quantized symbols; first means coupled to said local encoder and to said buffer means for providing a symbol value as a function of each quantized symbol and a check symbol supplied thereto; metric channel means coupled to said first means for accumulating a metric value as a function of V symbol values received from said first means; delta metric channel means coupled to said first means for providing a delta metric value as a function of V symbol values received from said first means; clock means coupled to said local encoder to said first means, to said metric channel means and to said delta metric channel means for controlling the sequential provision of said V check symbols, the sequential provision of said symbol values and the accumulation of said metric values and said delta metric values during a succession of V clock periods; and control means coupled to said clock means, to said metric channel means and to said delta metric channel means for controlling at the end of said V clock periods the metric value in said metric channel means as a function of the sign of the delta metric value accumulated in said delta metric channel means.
Claim 11
Dependent Claim
43 words
The arrangement as recited in claim 8 wherein said control means further include means for changing the state of the first stage of said local encoder whenever the metric value is affected as a result of the sign of the delta metric value.
Claim 12
Dependent Claim
59 words
The arrangement as recited in claim 8 wherein said control means includes means for transferring the delta metric value to said metric channel means during the Vth clock period and for adding said delta metric value to the metric value during a clock period following the Vth clock period only if said delta metric value has a preselected sign.
Claim 13
Dependent Claim
46 words
The arrangement as recited in claim 10 wherein said control means further includes means coupled to the first stage of said local encoder for changing the state thereof whenever, during the clock period following said Vth clock period, said delta metric value has said preselected sign.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-10 | 1976-04-10 | 1976-10-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-10 | 1980-04-10 | 1980-10-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-10 | 1984-04-10 | 1984-10-10 | $7700.00 | Window Closed / Lapsed |