US3697883A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic gain control circuit
Assignee: Motorola Solutions Inc
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Filing: 1970-09-10
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Granted: 1972-10-10
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Expires: 1990-09-10
Abstract
Abstract A gated sample and hold IF/RF integrated AGC circuit for a television receiver employs a combination of the synchronizing pulse and a flyback pulse for gating a peak detected video signal during the sync pulse interval to obtain the AGC voltage. A differential amplifier provides RF delay for the RF AGC, with negative feedback from the differential amplifier to the input of the IF AGC amplifier being employed to hold the IF AGC amplifier output constant during a transition period when the RF gain control is varied. Before and after this transition, the IF gain control follows the AGC voltage provided by the gated AGC input circuit.
Inventors
- 👤 Milton E Wilcox
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:33
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3052; H03G3/3068; H04; H04N; H04N5/00; H04N5/44; H04N5/52
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
159 words
A system for providing output voltages indicative of the level of an input voltage including in combination: first amplifier means providing an output indicative of the level of input voltages in a first region; second amplifier means providing a first substantially stable output with input voltages in said first region and providing a second output indicative of the level of input voltages in a second region; input circuit means for applying input voltages to the inputs of the first and second amplifier means; and feedback circuit means coupled with the output of the second amplifier means for supplying a control signal to the input of the first amplifier means, with the control signal being substantially constant for input voltages in said first region, and for input voltages in said second region being variable in an amount to off-set variations of input voltages in said second region to cause the output of the first amplifier means to be substantially constant.
Claim 2
Independent Claim
159 words
A system for providing output voltages indicative of the level of an input voltage including in combination: first amplifier means providing an output indicative of the level of input voltages in a first region; second amplifier means providing a first substantially stable output with input voltages in said first region and providing a second output indicative of the level of input voltages in a second region; input circuit means for applying input voltages to the inputs of the first and second amplifier means; and feedback circuit means coupled with the output of the second amplifier means for supplying a control signal to the input of the first amplifier means, with the control signal being substantially constant for input voltages in said first region, and for input voltages in said second region being variable in an amount to off-set variations of input voltages in said second region to cause the output of the first amplifier means to be substantially constant.
Claim 3
Dependent Claim
66 words
The combination according to claim 1 wherein the second amplifier means provides a second substantially stable output for input voltages in a third region and wherein the feedback circuit means comprises third amplifier means providing substantially constant control signals to the input of the first amplifier means in response to outputs of the second amplifier means indicative of input voltages in the first and third regions.
Claim 4
Dependent Claim
30 words
The combination according to claim 1 wherein the input circuit means includes means for isolating the output of the feedback circuit means from the input of the second amplifier means.
Claim 5
Dependent Claim
93 words
The combination according to claim 1 wherein the second amplifier means is differential amplifier means, having a reference input and a signal input, with the input circuit means coupled with the signal input thereof and with means for applying a reference potential to the reference input, the differential amplifier means assuming a first stable state of operation for input signals in said first region and bearing a predetermined relationship to the reference potential applied to the reference input thereof and assuming a changing state of operation for input signals in said second region.
Claim 6
Dependent Claim
100 words
The combination according to claim 4 wherein the differential amplifier means includes first and second transistors, each having collector, base, and emitter electrodes, with the emitter electrodes being coupled together at a common node, the base electrode of the first transistor being coupled with the input circuit means, and the base electrode of the second transistor being supplied with said reference potential, the collectors of the first and second transistors beIng coupled with a source of operating potential and the collector electrode of one of the first and second transistors being coupled with the input of the feedback circuit means.
Claim 7
Dependent Claim
62 words
The combination according to claim 5 wherein the feedback circuit means includes a third transistor having base, emitter, and collector electrodes, with the base electrode thereof being coupled with the collector electrode of one of the first or second transistors, and with the emitter-collector path thereof being connected between said source of operating potential and the input of the first amplifier means.
Claim 8
Dependent Claim
145 words
The combination according to claim 6 wherein the first amplifier means is a fourth transistor having base, emitter, and collector electrodes, with the base electrode thereof being coupled with the emitter-collector path of the third transistor and with the emitter electrode thereof providing said output indicative of the level of input voltage in said first region, the collector electrode of the fourth transistor being connected with a source of operating potential, and further wherein the input circuit means includes first and second emitter-follower transistors and impedance means, with the output of the first emitter-follower transistor being coupled with the base electrode of the first transistor and the base of the second emitter-follower transistor, with the impedance means being coupled between the output of the second emitter-follower transistor and a junction of the base of the fourth transistor with the emitter-collector path of the third transistor.
Claim 9
Dependent Claim
68 words
The combination according to claim 7 wherein the first and second amplifier means, the input circuit means, and the feedback circuit means all are formed as part of the same integrated circuit, with the first and second emitter-follower transistors of the input circuit and the first, second and fourth transistors of the first and second amplifier means being NPN transistors and the third transistor being an PNP transistor.
Claim 10
Dependent Claim
155 words
The combination according to claim 7, wherein the base of the third transistor is connected with the collector of the second transistor, the emitter of the third transistor is connected with said source of operating potential and the collector of said third transistor is connected with the base of the fourth transistor, with the first transistor being non-conductive and the second transistor being fully conductive for input signals in said first region, thereby causing the output of the third transistor to be a stable current for input signals in said first region, with the conductivity of the first transistor increasing and the conductivity of the second transistor decreasing for input signals in said second region, thereby causing the conductivity of the third transistor to vary for said input signals in said second region in an amount equal to and opposite to the variations of voltage applied to the fourth transistor by the input circuit means.
Claim 11
Dependent Claim
121 words
The combination according to claim 9 wherein input voltages in said second region are greater than input voltages in said first region and the differential amplifier operates with the first transistor fully conductive and the second transistor non-conductive for input voltages in a third region which are greater than the input voltages in said second and first regions, thereby causing the third transistors to be non-conductive for input voltages in the third region, so that the output of the first amplifier means varies in accordance with variations of the level of the input voltages in the third region, with the outputs of the first and second transistors in the differential amplifier being substantially constant for input voltages in said third region.
Claim 12
Dependent Claim
73 words
The combination according to claim 6 further including means coupled with the collectors of the first and second transistors for biasing the third transistor near its turn on point with the first and second transistors undergoing a change of conductivity, thereby causing the conductivIty of the third transistor to change at the same points, with respect to variations of the input voltages, causing a change of conductivity of the first and second transistors.
Claim 13
Dependent Claim
30 words
The combination according to claim 1 wherein the system is an integrated circuit system, the first and second transistors are NPN transistors and the third transistor is a PNP transistor.
References Cited (Backward Citations)
US3585294A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-10-10 | 1976-04-10 | 1976-10-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-10-10 | 1980-04-10 | 1980-10-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-10-10 | 1984-04-10 | 1984-10-10 | $7700.00 | Window Closed / Lapsed |