Fine timing recovery system

Claim 2

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a difference means for taking the difference between tap gains located on either side of said main signal tap and for providing a difference signal proportional to said difference; b. a stable clock means for providing a train of pulses having a frequency greater than the needed baud timing rate; c. an ADD/DELETE means receiving the pulse train from said stable clock and the difference signal from said difference means for adding or deleting pulses from said pulse train in response to said difference signal; and d. frequency divider means for dividing the frequency of said pulse train down to the baud rate so as to provide an output pulse train which is timed to the received data signal.

Claim 3

The invention according to claim 1 and further comprising a frequency divider means receiving the pulse train from said stable clock means for dividing the frequency of said pulse train down to a frequency which is greater than said baud rate which signal is fed to said ADD/DELETE means.

Claim 4

The invention according to claim 1 wherein said difference means takes the difference between even placed tap gains with respect to the main tap.

Claim 5

The invenTion according to claim 1 wherein said difference means takes the difference between odd placed tap gains with respect to the main taps.

Claim 6

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a difference means for taking the difference between tap gains located on either side of said main signal tap and for providing a difference signal proportional to said difference b. a stable clock means for providing a train of pulses having a frequency greater than the needed baud timing rate; c. a first frequency divider means for receiving the pulse train from said clock means and for dividing the frequency of said pulse train to a value still greater than the baud signal rate; d. an adjustable frequency divider means for dividing said pulse train from said first frequency divider means by a fixed amount n upon receipt of a first control signal, and by n+1 upon receipt of a second control signal, and by n-1 upon receipt of a third control signal, where the integer 1 corresponds to a pulse in said pulse train; e. a threshold detector means for receiving said difference signal and for providing said first control signal when said difference falls between an upper and a lower threshold, and said second control signal when said difference signal is above the upper threshold level, and a third control signal when said difference signal is below the lower threshold level; and f. second frequency divider means receiving the output signal from said adjustable frequency divider means for dividing said signal down to the baud transmission rate.

Claim 7

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a difference means for taking the difference between tap gains located on either side of said main signal tap and for providing a difference signal proportional to said difference b. a stable clock means for providing a train of pulses having a frequency greater than the needed baud timing rate; c. a first frequency divider means for receiving the pulse train from said clock means and for dividing the frequency of said pulse train to a value still greater than the baud signal rate; d. an adjustable frequency divider means for dividing said pulse train from said first frequency divider means by a fixed amount n upon receipt of a first control signal, and by n+1 upon receipt of a second control signal, and by n-1 upon receipt of a third control signal, where the integer 1 corresponds to a pulse in said pulse train; e. a threshold detector means for receiving said difference signal and for providing said first control signal when said difference falls between an upper and a lower threshold, and said second control signal when said difference signal is above the upper threshold level, and a third control signal when said difference signal is below the lower threshold level; and f. second frequency divider means receiving the output signal from said adjustable frequency divider means for dividing said signal down to the baud transmission rate.

Claim 8

The invention according to claim 5 wherein said summation means takes the difference between symmetrically positioned tap gains with respect to the main tap.

Claim 9

The invention according to claim 5 wherein said summation means takes the difference between even placed tap gains with respect to the main tap.

Claim 10

The invention according to claim 5 wherein said summation means takes the difference between odd placed tap gains with respect to the main tap.

Claim 11

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a summation means for summing the signal difference between the tap gains located on either side of said major signal tap, for providing a difference signal proportional to said difference; b. a stable clock means for providing a train of pulses having a frequency greater than the baud rate of transmission; c. a first frequency divider means for receiving the pulse train from said clock means and for dividing the frequency of said pulse train to a value still greater than the baud signal rate; d. a pulse ADD/DELETE means responsive to the signal from said summation means for adding or deleting pulses proportional to the magnitude and sign of said difference signal; and e. a second frequency divider means for receiving the output of said ADD/DELETE means and for dividing said output down to the baud transmission rate.

Claim 12

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a summation means for summing the signal difference between the tap gains located on either side of said major signal tap, for providing a difference signal proportional to said difference; b. a stable clock means for providing a train of pulses having a frequency greater than the baud rate of transmission; c. a first frequency divider means for receiving the pulse train from said clock means and for dividing the frequency of said pulse train to a value still greater than the baud signal rate; d. a pulse ADD/DELETE means responsive to the signal from said summation means for adding or deleting pulses proportional to the magnitude and sign of said difference signal; and e. a second frequency divider means for receiving the output of said ADD/DELETE means and for dividing said output down to the baud transmission rate.

Claim 13

The invention according to claim 9 wherein said summation means takes the difference in gains between symmetrically positioned taps with respect to the main tap.

Claim 14

The invention according to claim 9 wherein said summation means takes the difference in gains between even placed taps with respect to the main tap.

Claim 15

The invention according to claim 9 wherein said summation means takes thE difference in gains between odd placed taps with respect to the main tap.

Claim 16

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a summation means for summing the gain difference between the taps located on either side of said main signal tap, for providing a difference signal proportional to said difference; b. a stable clock means for providing a train of pulses having a frequency greater than the baud signal received by the transversal equalizer; c. a first frequency divider means for receiving the pulse train from said clock means and for dividing the frequency of said pulse train to a value still greater than the baud signal rate; d. filter means for receiving the pulse train from said first frequency divider means and for converting said pulse train into a sine wave signal of identical frequency; e. a digital-to-analog converter means for converting the output of the summation device into a proportional analog signal; f. phase modulator means for receiving the sine wave signal from said filter means and for receiving the proportional analog signal from said digital to analog converter so as to modulate said sine wave signal as a function of said proportional analog signal; g. means for converting the modulated sine wave signal from said phase modulator means into a pulse train signal having a frequency and phase corresponding to the frequency and phase of said sine wave signal; and h. a second frequency divider means for receiving the pulse train signal from said converter means and for dividing the frequency of said signal down to said baud rate.

Claim 17

In combination with an adaptive transversal equalizer having a plurally tapped delay line, with adjustable attenuators (or gains) connected to each delay line tap with one main tap for a major signal component and a summation circuit for combining the attenuated outputs of taps into a single coordinated signal, a fine timing recovery system comprising in combination: a. a summation means for summing the gain difference between the taps located on either side of said main signal tap, for providing a difference signal proportional to said difference; b. a stable clock means for providing a train of pulses having a frequency greater than the baud signal received by the transversal equalizer; c. a first frequency divider means for receiving the pulse train from said clock means and for dividing the frequency of said pulse train to a value still greater than the baud signal rate; d. filter means for receiving the pulse train from said first frequency divider means and for converting said pulse train into a sine wave signal of identical frequency; e. a digital-to-analog converter means for converting the output of the summation device into a proportional analog signal; f. phase modulator means for receiving the sine wave signal from said filter means and for receiving the proportional analog signal from said digital to analog converter so as to modulate said sine wave signal as a function of said proportional analog signal; g. means for converting the modulated sine wave signal from said phase modulator means into a pulse train signal having a frequency and phase corresponding to the frequency and phase of said sine wave signal; and h. a second frequency divider means for receiving the pulse train signal from said converter means and for dividing the frequency of said signal down to said baud rate.

Claim 18

The fine timing recovery system according to claim 13 wherein said converter means is further comprised of: a. an amplifier for amplifying said modulated sine wave signal; b. a limiter for converting the amplified sine wave signal into a square wave signal of proportional frequency; and c. a differentiator for differentiating said square wave signal so as to provide a pulse train signal of proportional frequency to said second frequency divider means.

Claim 19

The invention according to claim 13 wherein said summation means takes the difference in gain between symmetrically positioned taps with respect to the main located tap.

Claim 20

The invention according to claim 13 wherein said summation means takes the difference in gain between even placed taps with respect to the main tap.

Claim 21

The invention according to claim 13 wherein said summation means takes the difference in gain between odd placed taps with respect to the main tap.