Adaptive modem receiver

Claim 2

For use with a data transmission system which includes a limited bandwidth channel for conveying a data signal comprising a succession of periodic pulse symbols from a transmitter of said data signal to a remote receiver, an adaptive signal receiver comprising: means coupled to an output of said channel for developing an input signal representative of the data signal as propagated through said channel to said output, means for delaying said input signal, a plurality of symbol decision units, a plural stage shift register means, a succession of product summation units each comprising means for multiplying separately each pair of a plurality of pairs of quantities supplied thereto and for summing the respective products produced by said multiplications and each having associated therewith means for supplying thereto as respective ones of said quantities a set of signals respectively stored in successive stages of said shift register means, said set of said stored signals supplied to any given one of said product summation units other than the first thereof comprising signals which are progressively more delayed than are signals in said set of said stored signals supplied to the one of said product summation units preceding said given one thereof, means coupling an input of each of said symbol decision units to the output of a corresponding one of said product summation units and to a corresponding output of said output of said delay means, for supplying to respective ones of said decision units differently delayed versions of said received signal as corrected for intersymbol interference, means connecting the respective outputs of successive ones of said symbol decision units to selected successive, non-adjacent stages of said shift register, thereby to insert into said selected successive, non-adjacent stages the respective output signals of said successive ones of said symbol decision units, means coupled to an output of one of said product summation units and to an output of said means for delaying said input signal, for producing a signal representative of the difference between a delayed version of said input signal and a synthesis, produced by said one product summation unit, of said delayed version of said input signal, correlation means for correlating the outputs of given successive adjacent stages of said shift register with said signal representative of said difference, means coupling said correlation means to said given stages of said shift register and to an output of said means for producing said signal representative of said difference, and means for supplying given output signals of said correlating means to each of said succession of said product summation means, said given output signals supplied to said first of said product summation units being respectively representative of onlY those discrete timespaced components of the impulse response of said limited bandwidth channel which lag the maximum-amplitude component of such response, said given output signals supplied to said one product summation unit being respectively representative of both said discrete lagging time-spaced components and said maximumamplitude component as well as of those discrete time-spaced components of said impulse response which lead said maximumamplitude component thereof, and said given output signals supplied to said product summation units other than said first and said one units being respectively representative of only said discrete lagging time-spaced components and said discrete leading time-spaced components, each of said given output signals constituting the other of said quantities in a respective one of said pairs, whereby said decision units produce successively more refined estimates of the form of the received signal minus channel-introduced inter-symbol interference.

Claim 3

A receiver as set forth in claim 1 wherein said correlator means comprises signal divider means having first and second signal input means connecting at least one stage of said shift register means to said first input of said divider means, said connecting means permitting the supply of the data stored in a plurality of stages of said shift register to said divider means, means supplying to said second input of said divider means said signal representative of said difference between said delayed version of said input signal and said synthesis, and means for integrating each output of said divider means on a symbol by symbol basis over a plurality of symbol intervals.

Claim 4

For use with a data transmission system which includes a limited bandwidth channel for conveying a data signal comprising a succession of periodic pulse symbols from a transmitter generating said signal to an output remote from said transmitter, said channel being responsive to a transmitted unit impulse to produce at said remote output a wave having, at each of given successive times spaced by said period, an amplitude and a sign hereinafter collectively termed ''''impulse component'''', a first plurality of said impulse components occurring at those of said given successive times which are prior to the time of occurrence of that one impulse component representative of the amplitude and sign of said transmitted unit impulse, and a second plurality of said impulse components occurring at those of said given successive times which are after said time of occurrence of said one impulse component, said impulse components changing in value in response to changes in the physical characteristics of said channel, the signal received at said remote output in response to said transmitted data signal comprising, at said given successive times, a first part representative of the amplitude and sign of one of said pulse symbols of said transmitted data signal, a second part representative of the amplitude and sign of the contemporaneous sum of the leading portions of others of said pulse symbols transmitted after said one pulse symbol, and a third part representative of the amplitude and sign of the contemporaneous sum of the lagging portions of others of said pulse symbols transmitted before said one pulse symbol: an adaptive signal receiver comprising means coupled to said output of said channel for sampling said received signal at said given successive times, thereby to provide at each of said times an input signal representative of the contemporaneous sum of said three parts of said received signal, means for producing at each of said successive times, in response to said input signal and to a first correction signal approximately representative of said third part of said received signal, a first output signal substantially equal to the difference between said input signal and said first correction signal, first decision means for producing, in response to said first output signal and at each of said successive times, a first digital signal representative of a first estimate of the one of said transmitted pulse symbols to which said first part of said received signal corresponds, first shift register means comprising a plurality of successive adjacent stages at least equal in number to the number of impulse components in said second plurality thereof and including an input stage, means for supplying said first digital signal to said input stage, means also supplied with said input signal for delaying said input signal by at least the same number of pulse symbol periods as said number of impulse components in said second plurality thereof, thereby to produce a first delayed input signal, means for producing at each of said successive times, in response to said first delayed input signal and to an intermediate correction signal approximately representative of both said second part and said third part of said received signal, a second output signal substantially equal to the difference between said first delayed input signal and said intermediate correction signal, second decision means for producing, in response to said second output signal and at each of said successive times, a second digital signal representative of another estimate of said one of said transmitted pulse symbols to which said first part of said received signal corresponds, second shift register means comprising a plurality of successive adjacent stages which include an input stage and are at least equal in number to one less than the total number of said impulse components in both said first plurality thereof and said second plurality thereof, means for supplying said second digital signal to said input stage of said second shift register means, means responsive to said input signal for producing a replica of said input signal delayed by at least the same number of pulse symbol periods as said total number of impulse components in both said first and second pluralities thereof, means for producing at each of said successive times, in response to said replica of said input signal and to a synthesized signal representative of that input signal to which said replica corresponds, a third output signal substantially equal to the difference between said replica and said synthesized signal, means, supplied with said third output signal and with the respective estimates of successive ones of said transmitted pulse symbols stored in successive adjacent stages of said second shift register means, for cross-correlating said third output signal with said respective estimates, thereby to produce signals respectively representative of said one impulse component and said other impulse components of said first plurality and said second plurality, and first, second and third product summation means for producing respectively said first and intermediate correction signals and said synthesized signal, each of said product summation means comprising means for multiplying separately each pair of a plurality of pairs of quantities supplied thereto and for summing the respective products produced by said multiplications, one of said quantities of each pair representing one of said signals respectively representative of said impulse components and the other of said quantities of each pair representing one of said estimates, stored in said first and second shift register means, of said transmitted pulse symbols, means for supplying to said first product summation means said signals respectively representative of said impulse components of only said second plurality thereof, and said estimates respectively stored in successive stages of only said first shift register means, said pairs respectively comprising on the one hand time-successive ones of said impulse components of said second plurality and on the other hand successive ones of said estimates respectively stored in successive stages of said first shift register, means for supplying to said second product summatioN means said signals respectively representing said impulse components of both said first and second pluralities thereof, and respective estimates stored in both said first and said second shift register means, said pairs respectively comprising on the one hand time-successive ones of said impulse components of said first plurality and on the other hand successive ones of said estimates respectively stored in successive stages of said first shift register means, said pairs also comprising on the one hand time-successive ones of said impulse components of said second plurality and on the other hand successive ones of said estimates respectively stored in successive stages of said second shift register means, and means for supplying to said third product summation means said signals respectively representing said one impulse component and said impulse components of both said first and said second pluralities thereof, and respective successive estimates stored in successive stages of at least said second shift register means.

Claim 5

For use with a data transmission system which includes a limited bandwidth channel for conveying a data signal comprising a succession of periodic pulse symbols from a transmitter generating said signal to an output remote from said transmitter, said channel being responsive to a transmitted unit impulse to produce at said remote output a wave having, at each of given successive times spaced by said period, an amplitude and a sign hereinafter collectively termed ''''impulse component'''', a first plurality of said impulse components occurring at those of said given successive times which are prior to the time of occurrence of that one impulse component representative of the amplitude and sign of said transmitted unit impulse, and a second plurality of said impulse components occurring at those of said given successive times which are after said time of occurrence of said one impulse component, said impulse components changing in value in response to changes in the physical characteristics of said channel, the signal received at said remote output in response to said transmitted data signal comprising, at said given successive times, a first part representative of the amplitude and sign of one of said pulse symbols of said transmitted data signal, a second part representative of the amplitude and sign of the contemporaneous sum of the leading portions of others of said pulse symbols transmitted after said one pulse symbol, and a third part representative of the amplitude and sign of the contemporaneous sum of the lagging portions of others of said pulse symbols transmitted before said one pulse symbol: an adaptive signal receiver comprising means coupled to said output of said channel for sampling said received signal at said given successive times, thereby to provide at each of said times an input signal representative of the contemporaneous sum of said three parts of said received signal, means for producing at each of said successive times, in response to said input signal and to a first correction signal approximately representative of said third part of said received signal, a first output signal substantially equal to the difference between said input signal and said first correction signal, first decision means for producing, in response to said first output signal and at each of said successive times, a first digital signal representative of a first estimate of the one of said transmitted pulse symbols to which said first part of said received signal corresponds, first shift register means comprising a plurality of successive adjacent stages at least equal in number to the number of impulse components in said second plurality thereof and including an input stage, means for supplying said first digital signal to said input stage, means also supplied with said input signal for delaying said input signal by at least the same number of pulse symbol periods as said number of impulse components in said second plurality thereof, thereby to produce a first delayed input signal, means for producing at each of said successive times, in response to said first delayed input signal and to an intermediate correction signal approximately representative of both said second part and said third part of said received signal, a second output signal substantially equal to the difference between said first delayed input signal and said intermediate correction signal, second decision means for producing, in response to said second output signal and at each of said successive times, a second digital signal representative of another estimate of said one of said transmitted pulse symbols to which said first part of said received signal corresponds, second shift register means comprising a plurality of successive adjacent stages which include an input stage and are at least equal in number to one less than the total number of said impulse components in both said first plurality thereof and said second plurality thereof, means for supplying said second digital signal to said input stage of said second shift register means, means responsive to said input signal for producing a replica of said input signal delayed by at least the same number of pulse symbol periods as said total number of impulse components in both said first and second pluralities thereof, means for producing at each of said successive times, in response to said replica of said input signal and to a synthesized signal representative of that input signal to which said replica corresponds, a third output signal substantially equal to the difference between said replica and said synthesized signal, means, supplied with said third output signal and with the respective estimates of successive ones of said transmitted pulse symbols stored in successive adjacent stages of said second shift register means, for cross-correlating said third output signal with said respective estimates, thereby to produce signals respectively representative of said one impulse component and said other impulse components of said first plurality and said second plurality, and first, second and third product summation means for producing respectively said first and intermediate correction signals and said synthesized signal, each of said product summation means comprising means for multiplying separately each pair of a plurality of pairs of quantities supplied thereto and for summing the respective products produced by said multiplications, one of said quantities of each pair representing one of said signals respectively representative of said impulse components and the other of said quantities of each pair representing one of said estimates, stored in said first and second shift register means, of said transmitted pulse symbols, means for supplying to said first product summation means said signals respectively representative of said impulse components of only said second plurality thereof, and said estimates respectively stored in successive stages of only said first shift register means, said pairs respectively comprising on the one hand time-successive ones of said impulse components of said second plurality and on the other hand successive ones of said estimates respectively stored in successive stages of said first shift register, means for supplying to said second product summatioN means said signals respectively representing said impulse components of both said first and second pluralities thereof, and respective estimates stored in both said first and said second shift register means, said pairs respectively comprising on the one hand time-successive ones of said impulse components of said first plurality and on the other hand successive ones of said estimates respectively stored in successive stages of said first shift register means, said pairs also comprising on the one hand time-successive ones of said impulse components of said second plurality and on the other hand successive ones of said estimates respectively stored in successive stages of said second shift register means, and means for supplying to said third product summation means said signals respectively representing said one impulse component and said impulse components of both said first and said second pluralities thereof, and respective successive estimates stored in successive stages of at least said second shift register means.