US3694673A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Field effect device and circuit having high current driving capabilities utilizing such device
Assignee: Microsystems International Ltd
•
Filing: 1971-03-15
•
Granted: 1972-09-26
•
Expires: 1991-03-15
Abstract
Abstract High speed, high voltage swing, low output impedance clock circuit is described. The circuit is designed to provide high current drive and uses a novel field effect device to resistively couple supply voltage to output voltage. The invention further relates to the field effect device per se.
Inventors
- 👤 Kenneth K Au
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:08
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/811; H10D84/817; H10D99/00
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
252 words
A push-pull current driver circuit comprising a first insulated-gate field effect device comprising a plurality of gate, source and drain regions and a diffused high-impedance resistive path between source and drain electrodes for said device, said path meandering between said gate regions and constituting drain and source regions adjacent said gate regions in such manner that upon turn-on of said device, said highimpedance path is shunted by channel regions underlying said gate regions between said source and drain regions of said device and further comprising second, third, and fourth field effect devices, said second device and said diffused high-impedance resistive path of said first device constituting a first ratio inverter, and said third and fourth devices constituting a second ration inverter, means connected to the source electrodes of said second and fourth devices for connection to reference ground potential, means connected to the gate electrodes of said second and fourth devices for connection to an input signal supply means, means connected to the drain electrode of said first device for connection to first drain potential supply means, means connected to the drain electrode of said third device for connection to second drain potential supply means, means connected to the gate electrode of said third device for connection to gate potential supply means, means connecting the gate regions of said first device to the source electrode of said third device, and means for deriving an output signal from the output of said first ratio inverter at the source electrode of said first device.
Claim 2
Dependent Claim
252 words
A push-pull current driver circuit comprising a first insulated-gate field effect device comprising a plurality of gate, source and drain regions and a diffused high-impedance resistive path between source and drain electrodes for said device, said path meandering between said gate regions and constituting drain and source regions adjacent said gate regions in such manner that upon turn-on of said device, said highimpedance path is shunted by channel regions underlying said gate regions between said source and drain regions of said device and further comprising second, third, and fourth field effect devices, said second device and said diffused high-impedance resistive path of said first device constituting a first ratio inverter, and said third and fourth devices constituting a second ration inverter, means connected to the source electrodes of said second and fourth devices for connection to reference ground potential, means connected to the gate electrodes of said second and fourth devices for connection to an input signal supply means, means connected to the drain electrode of said first device for connection to first drain potential supply means, means connected to the drain electrode of said third device for connection to second drain potential supply means, means connected to the gate electrode of said third device for connection to gate potential supply means, means connecting the gate regions of said first device to the source electrode of said third device, and means for deriving an output signal from the output of said first ratio inverter at the source electrode of said first device.
Claim 3
Dependent Claim
26 words
The push-pull current driver circuit of claim 1 wherein said first drain potential supply means and said gate potential supply means are one and the same.
Claim 4
Dependent Claim
28 words
The push-pull current driver circuit of claim 1 wherein said gate regions are formed from two interconnected and interdigitated spaced generally comb-like regions defining said meandering path therebetween.
References Cited (Backward Citations)
US3479523A
Cited
FR1566559A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-09-26 | 1976-03-27 | 1976-09-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-09-26 | 1980-03-27 | 1980-09-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-09-26 | 1984-03-27 | 1984-09-26 | $7700.00 | Window Closed / Lapsed |