Gaseous display driver circuits

Claim 2

In a matrix addressed system including an array of crosspoint cells defined by respective row and column conductors, a source of alternating polarity sustaining signals, and individual driver circuits respectively connected to each of said conductors for coupling said sustaining signals to said crosspoint cells in common and for selectively addressing individual ones of said cells; each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for continuously coupling said sustaining signals thereto.

Claim 3

In a matrix addressed system including an array of crosspoint cells defined by respective row and column conductors, a source of alternating polarity sustaining signals, and individual driver circuits respectively connected to each of said conductors for coupling said sustaining signals to said crosspoint cells in common and for selectively addressing individual ones of said cells; each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for coupling said sustaining signals thereto, said diode means comprising a charge storage diode poled so as to store charge during conduction of one polarity of said sustaining signals, said stored charge providing for conduction of the other polarity of said sustaining signals through said diode.

Claim 4

In a matrix addressed system including an array of crosspoint cells defined by respective row and column conductors, a source of alternating polarity sustaining signals, and individual driver circuits respectively connected to each of said conductors for coupling said sustaining signals to said crosspoint cells in common and for selectively addressing individual ones of said cells; each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for coupling said sustaining signals thereto, said diode means comprising a charge storage diode poled so as to store charge during conduction of one polarity of said sustaining signals, said stored charge providing for conduction of the other polarity of said sustaining signals through said diode.

Claim 5

In a matrix addressed system including an array of crosspoint cells defined by respective row and column conductors, a source of alternating polarity sustaining signals, and individual driver circuits respectively connected to each of said conductors for coupling said sustaining signals to said crosspoint cells in common and for selectively addressing individual ones of said cells; each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for coupling said sustaining signals thereto; said source of sustaining signals comprising a source of positive polarity sustaining signals and a source of negative polarity sustaining signals, and said diode means comprising a pair of oppositely poled diodes, one of said diodes coupling the positive polarity sustaining signals and the other of said diodes coupling the negative polarity sustaining signals to said respective one of said conductors.

Claim 6

In a matrix addressed system including an array of crosspoint cells defined by respective row and column conductors, a source of alternating polarity sustaining signals, and individual driver circuits respectively connected to each of said conductors for coupling said sustaining signals to said crosspoint cells in common and for selectively addressing individual ones of said cells; each of said driver circuits comprising a selection device adapted for selectively addressing a respective one of said conductors, and diode means connected between said source of sustaining signals and said respective one of said conductors for coupling said sustaining signals thereto; said source of sustaining signals comprising a source of positive polarity sustaining signals and a source of negative polarity sustaining signals, and said diode means comprising a pair of oppositely poled diodes, one of said diodes coupling the positive polarity sustaining signals and the other of said diodes coupling the negative polarity sustaining signals to said respective one of said conductors.

Claim 7

A system according to claim 3 wherein said selection device comprises a charge storage diode adapted to provide a normaLly high impedance path to signals for addressing said respective one of said conductors.

Claim 8

A system according to claim 4 further comprising means for applying addressing signals in common to each of said driver circuits, and means for storing charge in said charge storage diode in a selected one of said driver circuits, thereby providing a low impedance path for said addressing signals through said selected one driver circuit.

Claim 9

A pulsed discharge gaseous display system including an array of display cells defined by respective pairs of conductors; a source of positive and negative polarity sustaining signals; a source of write-erase signals; and individual driver circuits respectively connected to each of said conductors; said driver circuits each comprising a pair of oppositely poled diodes for respectively coupling said positive and negative polarity sustaining signals to a respective one of said conductors, and an asymmetrically conducting selection device connected between said source of write-erase signals and said respective one conductor, said selection device storing an electrical charge when a corresponding one of said display cells is addressed, thereby coupling said write-erase signals to said respective one conductor.

Claim 10

A pulsed discharge gaseous display system including an array of display cells defined by respective pairs of conductors; a source of positive and negative polarity sustaining signals; a source of write-erase signals; and individual driver circuits respectively connected to each of said conductors; said driver circuits each comprising a pair of oppositely poled diodes for respectively coupling said positive and negative polarity sustaining signals to a respective one of said conductors, and an asymmetrically conducting selection device connected between said source of write-erase signals and said respective one conductor, said selection device storing an electrical charge when a corresponding one of said display cells is addressed, thereby coupling said write-erase signals to said respective one conductor.

Claim 11

A driver circuit for use in a plasma display, said driver circuit comprising three input terminals, an output terminal, and a pair of oppositely poled diodes and a charge storage diode respectively connecting said three input terminals in common to said output terminals, said pair of diodes adapted for respectively coupling positive and negative sustaining signals to the display, and said charge storage diode adapted when charge is stored therein to provide a low impedance path for coupling write-erase signals to the display.

Claim 12

A driver circuit for use in a plasma display, said driver circuit comprising three input terminals, an output terminal, and a pair of oppositely poled diodes and a charge storage diode respectively connecting said three input terminals in common to said output terminals, said pair of diodes adapted for respectively coupling positive and negative sustaining signals to the display, and said charge storage diode adapted when charge is stored therein to provide a low impedance path for coupling write-erase signals to the display.

Claim 13

A matrix array of driver circuits for coupling alternating polarity signals in common to respective ones of a plurality of drive conductors and for coupling addressing signals selectively to said respective ones of said drive conductors; said array comprising a first set of matrix leads for connecting one polarity of said alternating polarity signals to said driver circuits; a second set of matrix leads for connecting the other polarity of said alternating polarity signals to said driver circuits; a third set of matrix leads for connecting said addressing signals to said driver circuits; and a fourth set of leads individually connecting said drive conductors to respective ones of said driver circuits; each of said driver circuits including a first diode connected between one of said first set and one of said fourth set of leads, a second diode connected between one of said second set and one of said fourth set of leads, and a third diode having a long minority carrier lifetime connected between one of said third set and one of said fourth set of leads, said first diode poled for conduction of said one polarity signals, said second diode poled for conduction of said other polarity signals, and said third diode poled against conduction of said addressing signals, said third diode conducting said addressing signals substantially only when charge is stored therein.

Claim 14

A matrix array of driver circuits for coupling alternating polarity signals in common to respective ones of a plurality of drive conductors and for coupling addressing signals selectively to said respective ones of said drive conductors; said array comprising a first set of matrix leads for connecting one polarity of said alternating polarity signals to said driver circuits; a second set of matrix leads for connecting the other polarity of said alternating polarity signals to said driver circuits; a third set of matrix leads for connecting said addressing signals to said driver circuits; and a fourth set of leads individually connecting said drive conductors to respective ones of said driver circuits; each of said driver circuits including a first diode connected between one of said first set and one of said fourth set of leads, a second diode connected between one of said second set and one of said fourth set of leads, and a third diode having a long minority carrier lifetime connected between one of said third set and one of said fourth set of leads, said first diode poled for conduction of said one polarity signals, said second diode poled for conduction of said other polarity signals, and said third diode poled against conduction of said addressing signals, said third diode conducting said addressing signals substantially only when charge is stored therein.