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US3688261A Expired / Lapsed US ⏱️ 0.0 years remaining

Logic processing system

Assignee: Western Atlas Inc
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Filing: 1970-10-05
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Granted: 1972-08-29
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Expires: 1990-10-05
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Abstract

Abstract A logic processing system as disclosed comprising a character checking device which indicates whether the incoming parallel binary coded character has a predetermined number of binary 1s. If the predetermined number of ones is received a plurality of gates passes the signal on to a receiving device. If, on the other hand, the character received does not possess the predetermined number of binary 1s, the character checking device provides a signal under control of a clock to said gates for replacing the ''''bad'''' character with a predetermined bad character - code and, in addition, at the end of a word comprising a plurality of such characters inserts, through end of word logic, an end of word character through a first of the plurality of gates. The code signifies whether the word passed through the receiving device possess all good characters or one or more bad characters.

Inventors

  • 👤 John Franklin Henderson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:09
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/0703; G06F11/0766; G06F11/0772; G06F11/08; G06F11/085; H; H04; H04L; H04L1/00; H04L1/004

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 116 words
A logic system for receiving, evaluating, and transmitting characters of binary coded words comprising: gating means for gating through the characters of binary coded words; and checking means for controlling said gating means and for preventing the gating of any character not having a predetermined number of bits in a particular binary state, a character not having said predetermined number of bits being denominated a ''''bad'''' character, a character having said predetermined number of bits being denominated a ''''good'''' character; said checking means including means for generating a first predetermined character indicative of the ''''bad'''' character and for causing said gating means to gate through said first predetermined character as a substitute for the ''''bad'''' character.
Claim 2
Dependent Claim 116 words
A logic system for receiving, evaluating, and transmitting characters of binary coded words comprising: gating means for gating through the characters of binary coded words; and checking means for controlling said gating means and for preventing the gating of any character not having a predetermined number of bits in a particular binary state, a character not having said predetermined number of bits being denominated a ''''bad'''' character, a character having said predetermined number of bits being denominated a ''''good'''' character; said checking means including means for generating a first predetermined character indicative of the ''''bad'''' character and for causing said gating means to gate through said first predetermined character as a substitute for the ''''bad'''' character.
Claim 3
Dependent Claim 91 words
A logic system as recited in claim 1 wherein said checking means includes means for generating a second predetermined character indicating that the word evaluated by said system has therein all ''''good'''' characters and also for generating a third predetermined character indicating that the word evaluated by said system has therein any ''''bad'''' character, and for causing said gating means to gate through said evaluated word together with said second or third predetermined characters, depending respectively upon whether the word has therein all ''''good'''' characterS or has therein a ''''bad'''' character.
Claim 4
Dependent Claim 57 words
A logic system as recited in claim 1 wherein said checking means comprises character checking device means providing signals indicative of whether or not the characters have said predetermined number of bits, said gating means responsive to said signals provided by said character checking device means to provide said first predetermined character instead of a ''''bad'''' character.
Claim 5
Dependent Claim 64 words
A logic system as recited in claim 3 wherein said character checking device means comprises means for detecting the number of bits in said particular binary state of the character received by said system and logic means for providing a signal indicative of a ''''good'''' character (i.e. a ''''good'''' character signal) and a signal indicative of a ''''bad'''' character (i.e. a ''''bad'''' character signal).
Claim 6
Dependent Claim 68 words
A logic system as recited in claim 4 wherein the characters are binary coded and serially received bits and said gating means comprises at least two groups of gates, each of said group of gates comprising a plurality of individual gating means, said two groups of gates responding to said ''''bad'''' character signals to transmit said first predetermined character upon receipt by said system of a ''''bad'''' character.
Claim 7
Dependent Claim 58 words
A logic system as recited in claim 5 wherein said checking means includes means for providing a second predetermined character at the end of a binary word indicating whether the word evaluated by said system has therein all ''''good'''' characters and a third predetermined character indicating that the word evaluated by said system has any ''''bad'''' characters therein.
Claim 8
Dependent Claim 56 words
A logic system as recited in claim 5 further comprising clock means for providing clock signals at the time of receipt of a character, said clock being coupled to said character checking device means such that said character checking device means is capable of providing said ''''bad'''' signals only upon the presence of said clock signal.
Claim 9
Dependent Claim 24 words
A logic system as recited in claim 7 further comprising error logic means for providing an indication of a ''''bad'''' character having been received.
Claim 10
Dependent Claim 28 words
A logic system as recited in claim 8 wherein said error logic means is coupled to said character checking device means and is responsive to said ''''bad'''' signal.
Claim 11
Dependent Claim 29 words
A logic system as recited in claim 9 wherein at least one of said individual gating means in said two groups of gates is responsive to said ''''bad'''' signal.
Claim 12
Dependent Claim 123 words
A logic system as recited in claim 10 wherein said means for detecting the number of binary states of the characters received has two output lines and provides binary 0s on said output lines if a received character has less than two binary 1s, binary 1 and 0 on a first and second respectively of said output lines, if the character received has two binary 1s, and binary 1s on said output lines if the character has more than two binary 1s, said logic means comprising a first gate coupled to said output lines, a second gate coupled to said first NOR gate and said first output line, and a third gate coupled to said second NOR gate and to said clock means.
Claim 13
Dependent Claim 44 words
A logic system as recited in claim 11 further comprising gate control means coupled to said gating means and said clock such that said gate control means prevents characters from being transmitted during the period said clock means does not provide said clock signal.
Claim 14
Dependent Claim 61 words
A logic system as recited in claim 12 wherein said gate control means comprises at least one gate, said gate control means gate is coupled to said clock and coupled, at its output, to one of said two groups of gates such that said logic system transmits a character only upon receipt by said gate control means of said clock signal.
Claim 15
Dependent Claim 128 words
A logic system for receiving, evaluating, and transmitting characters of binary coded words comprising: gating means for gating through each character of binary coded words; and checking mEans including means for generating a first predetermined character indicating if the word contains characters each containing a predetermined number of bits of a particular binary state (i.e. a ''''good'''' character) and a second predetermined character if the word contains any character not having said predetermined number of bits (i.e. a ''''bad'''' character), and for controlling said gating means to gate through said word together with said first predetermined character if the word contains only good characters and for controlling said gating means to gate through said word together with said second predetermined character if the word contains any ''''bad'''' character.
Claim 16
Dependent Claim 128 words
A logic system for receiving, evaluating, and transmitting characters of binary coded words comprising: gating means for gating through each character of binary coded words; and checking mEans including means for generating a first predetermined character indicating if the word contains characters each containing a predetermined number of bits of a particular binary state (i.e. a ''''good'''' character) and a second predetermined character if the word contains any character not having said predetermined number of bits (i.e. a ''''bad'''' character), and for controlling said gating means to gate through said word together with said first predetermined character if the word contains only good characters and for controlling said gating means to gate through said word together with said second predetermined character if the word contains any ''''bad'''' character.
Claim 17
Dependent Claim 86 words
A logic system as recited in claim 14 wherein said checking means comprises character checking device means for providing a character checking ''''good'''' signal indicative of the receipt of a ''''good'''' character and a character checking ''''bad'''' signal indicative of the receipt of a ''''bad'''' character, and, means for determining an error condition coupled to said gating means and responsive to said character checking good and bad signals such that said gating means transmits said first and second predetermined characters upon the end of said word.
Claim 18
Dependent Claim 45 words
A logic system as recited in claim 15 wherein said gating means comprises at least two groups of gating means each of said two groups comprising individual gating means with at least one of said individual gating means for each bit location of a character.
Claim 19
Dependent Claim 69 words
A logic system as recited in claim 16 wherein said means for determining an error condition comprises: error logic means coupled to said character checking device means and providing error logic ''''good'''' and ''''bad'''' signals and, end of word logic means responsive to said error logic ''''good'''' and ''''bad'''' signals and coupled to predetermined ones of said individual gating means of one of said two groups of gating means.
Claim 20
Dependent Claim 116 words
A logic system as recited in claim 17 wherein said error logic means comprises at least one flip-flop coupled to said character checking device means and said end of word logic means comprises means for providing an end of word signal which indicates the end of a word and at least two gates, said end of word gates being responsive to said means for providing said end of word signal and coupled to said flip-flop such that upon the end of a word said end of word gates provides to said one of said two groups of means said gating signals to cause said gating means to transmit either of said first or second predetermined characters.

References Cited (Backward Citations)

US2231397A Cited
US3160852A Cited
US3470532A Cited
US3535681A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-08-29 1976-02-28 1976-08-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-08-29 1980-02-28 1980-08-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-08-29 1984-02-28 1984-08-29 $7700.00 Window Closed / Lapsed

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