US3688129A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal control circuit
Assignee: Sony Corp
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Filing: 1970-08-21
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Granted: 1972-08-29
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Expires: 1990-08-21
Abstract
Abstract A transistorized signal control circuit including a pair of transistors which are connected between both ends of a DC power source in the same conductive direction and a plurality of series-connected resistive elements between a couple of corresponding respective electrodes of the transistors. Input terminals are connected to the other couple of corresponding respective electrodes of the transistors and output terminals are connected to connecting points between the series-connected resistive elements. A signal supplied from the input terminals and derived from the output terminals is controlled its amplitude without being changed its DC voltage level.
Inventors
- 👤 Yoshio Ishigaki
- 👤 Hajime Shinoda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 02:42
CPC Classifications
H; H03; H03G; H03G1/00; H03G1/0005; H03G1/0035; H03G1/0082
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
187 words
A transistorized signal control circuit for controlling the amplitude of a signal without changing its DC voltage level, comprising a pair of transistors of substantially equal characteristics and each having first, second and third electrodes, means connecting said first and second electrodes of each of said transistors across a DC voltage source in the same conductive direction, means for receiving the input signal to be controlled and supplying said input signal to said third electrode of each of said transistors with the phase of said input signal thus supplied to one of said transistors being opposite to the phase of said input signal supplied to the other of said transistors, a plurality of series-connected resistive elements connected between said second electrodes of said pair of transistors and including an inteRmediate variable resistive element, and a pair of output terminals connected with said series-connected resistive elements at opposite sides of said variable resistive element, switching means connected between ground and the connection of each of said output terminals with said series-connected resistive elements, and control means controlling said switching means for selectively causing shortcircuiting of said output terminals.
Claim 2
Dependent Claim
187 words
A transistorized signal control circuit for controlling the amplitude of a signal without changing its DC voltage level, comprising a pair of transistors of substantially equal characteristics and each having first, second and third electrodes, means connecting said first and second electrodes of each of said transistors across a DC voltage source in the same conductive direction, means for receiving the input signal to be controlled and supplying said input signal to said third electrode of each of said transistors with the phase of said input signal thus supplied to one of said transistors being opposite to the phase of said input signal supplied to the other of said transistors, a plurality of series-connected resistive elements connected between said second electrodes of said pair of transistors and including an inteRmediate variable resistive element, and a pair of output terminals connected with said series-connected resistive elements at opposite sides of said variable resistive element, switching means connected between ground and the connection of each of said output terminals with said series-connected resistive elements, and control means controlling said switching means for selectively causing shortcircuiting of said output terminals.
Claim 3
Dependent Claim
40 words
A transistorized signal control circuit according to claim 1, in which said input signal is a television signal, and said control means controls said switching means in accordance with the presence of a color video signal in said television signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-08-29 | 1976-02-28 | 1976-08-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-08-29 | 1980-02-28 | 1980-08-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-08-29 | 1984-02-28 | 1984-08-29 | $7700.00 | Window Closed / Lapsed |