Digital attenuator for non-linear pulse code modulation signals

Claim 2

Attenuation apparatus for use with a digital code word comprising a segment code and a position code including: means for decoding the segment code, means responsive to said decoding means for selectively adding a one to a selected bit position of the position code thereby producing a position code sum, wherein said adding means includes carry propagation means, means responsive to said adding means for selectively decrementing the segment code, and means responsive to said adding means for selectively shifting said position code sum.

Claim 3

Apparatus as in claim 1 wherein said means for selectively decrementing the segment code further comprises: means for decrementing the segment code by one, and means responsive to saId adding means and said decoding means for selectively incrementing the decremented segment code.

Claim 4

A digital attenuator for producing 6 decibels of attenuation of a pulse code modulation signal encoded according to the eight-bit mu 255 law wherein the segment code is designated by the bits ABC and the position code is designated by the bits WXYZ comprising: a decoder which operates on bits ABC to produce an output on one of five output leads according to the values of ABC ranging from 000 to 100, a subtract-one circuit which operates on ABC to produce the decremented value A''B''C'', a seven-stage binary adder to which is applied an addend A''B''C''WXYZ and an augend comprising the five output leads from the decoder applied to the low-order stages of the adder to produce the sum A''''B''''C''''W''X''Y''Z'', means for detecting a difference in the low order bit of the decremented segment code code C'' and the output of the third-most significant stage of the adder C'''', and a shift-one circuit which operates on the low order four bits W''X''Y''Z'' of the sum in response to said detecting means.

Claim 5

A digital attenuator for producing 6 decibels of attenuation of a pulse code modulation signal encoded according to the eight-bit mu 255 law wherein the segment code is designated by the bits ABC and the position code is designated by the bits WXYZ comprising: a decoder which operates on bits ABC to produce an output on one of five output leads according to the values of ABC ranging from 000 to 100, a subtract-one circuit which operates on ABC to produce the decremented value A''B''C'', a seven-stage binary adder to which is applied an addend A''B''C''WXYZ and an augend comprising the five output leads from the decoder applied to the low-order stages of the adder to produce the sum A''''B''''C''''W''X''Y''Z'', means for detecting a difference in the low order bit of the decremented segment code code C'' and the output of the third-most significant stage of the adder C'''', and a shift-one circuit which operates on the low order four bits W''X''Y''Z'' of the sum in response to said detecting means.

Claim 6

A digital attenuator for producing 6 decibel attenuation of a pulse code modulation signal encoded according to the eight-bit mu 255 law wherein the segment code is designated by the bits ABC and the position code is designated by the bits WXYZ comprising: a decoder which operates on ABC to produce an output on one of five output leads according to the values of ABC ranging from 000-100, a four-stage binary adder to which is applied an addend WXYZ and an augend comprising the four output leads from the decoder which produces an output according to the values ABC ranging from 001-100 which adder produces sum bits W''X''Y''Z'' and a carry signal indicating overflow from the high order W'' position, means for producing a control signal in response to either the carry signal or the output from said decoder indicating a value of ABC 000, a shift-one circuit which operates on the sum bits W''X''Y''Z'' in response to the control signal, and a subtractor which operates on ABC to decrement its value by one in response to the inverse of the control signal.

Claim 7

A digital attenuator for producing 6 decibel attenuation of a pulse code modulation signal encoded according to the eight-bit mu 255 law wherein the segment code is designated by the bits ABC and the position code is designated by the bits WXYZ comprising: a decoder which operates on ABC to produce an output on one of five output leads according to the values of ABC ranging from 000-100, a four-stage binary adder to which is applied an addend WXYZ and an augend comprising the four output leads from the decoder which produces an output according to the values ABC ranging from 001-100 which adder produces sum bits W''X''Y''Z'' and a carry signal indicating overflow from the high order W'' position, means for producing a control signal in response to either the carry signal or the output from said decoder indicating a value of ABC 000, a shift-one circuit which operates on the sum bits W''X''Y''Z'' in response to the control signal, and a subtractor which operates on ABC to decrement its value by one in response to the inverse of the control signal.

Claim 8

The machine method of attenuating a digital pulse code modulated signal including electrical signals representing segment and position codes which comprises the steps of: selectively incrementing by machine electrical signals representing the position code by an amount dependent upon the value of the segment code, thereby producing electrical signals representing a position code sum, selectively shifting by machine electrical signals representing the position code sum dependent upon the value of the segment code and upon the occurrence of an electrical signal representing overflow of the position code sum, and selectively decrementing by machine electrical signals representing the segment code in the event the step of shifting is not performed.

Claim 9

The machine method of attenuating a digital pulse code modulated signal including electrical signals representing segment and position codes which comprises the steps of: selectively incrementing by machine electrical signals representing the position code by an amount dependent upon the value of the segment code, thereby producing electrical signals representing a position code sum, selectively shifting by machine electrical signals representing the position code sum dependent upon the value of the segment code and upon the occurrence of an electrical signal representing overflow of the position code sum, and selectively decrementing by machine electrical signals representing the segment code in the event the step of shifting is not performed.

Claim 10

The machine method as in claim 5 wherein the step of selectively decrementing by machine electrical signals representing the segment code further comprises the steps of: uniformly decrementing by machine electrical signals representing the segment code, and selectively restoring by machine electrical signals representing the segment code.

Claim 11

The machine attenuation method for a pulse code modulation signal for use with electrical signals representing segment and position digital codes comprising the steps of: decoding by machine electrical signals representing the segment code thereby determining the segment identity; adding by machine to the electrical signals representing the position code electrical signals representing an amount chosen in response to the segment identity thereby producing electrical signals repResenting a position code sum and selectively producing an electrical signal representing overflow of the position code sum; subtracting by machine one from the electrical signals representing the segment code in response to the segment identity and the absence of the electrical signal representing overflow from said adding step; and shifting by machine electrical signals representing the position code sum in response to the segment identity and the electrical signal representing overflow from said adding step.

Claim 12

The machine attenuation method for a pulse code modulation signal for use with electrical signals representing segment and position digital codes comprising the steps of: decoding by machine electrical signals representing the segment code thereby determining the segment identity; adding by machine to the electrical signals representing the position code electrical signals representing an amount chosen in response to the segment identity thereby producing electrical signals repResenting a position code sum and selectively producing an electrical signal representing overflow of the position code sum; subtracting by machine one from the electrical signals representing the segment code in response to the segment identity and the absence of the electrical signal representing overflow from said adding step; and shifting by machine electrical signals representing the position code sum in response to the segment identity and the electrical signal representing overflow from said adding step.

Claim 13

The machine attenuation method performed on a nonlinearly encoded pulse code modulation signal including electrical signals representing position and segment codes comprising the steps of: decoding by machine electrical signals representing the segment code thereby determining the identity of the segment; selectively adding by machine an electrical signal representing a one to a selected bit position of the electrical signal representing the position code dependent on the segment identity and allowing carries to propagate, thereby producing electrical signals representing a position code sum; detecting by machine any electrical signal which represents a carry which propagates from the most significant bit position of the electrical signal which represents the position code; producing by machine an electrical shift signal in response to the carry detection and dependent on the segment identity; shifting by machine electrical signals representing the position code in response to the shift signal; and decrementing by machine electrical signals representing the segment code in response to the inverse of the shift signal.

Claim 14

The machine attenuation method performed on a nonlinearly encoded pulse code modulation signal including electrical signals representing position and segment codes comprising the steps of: decoding by machine electrical signals representing the segment code thereby determining the identity of the segment; selectively adding by machine an electrical signal representing a one to a selected bit position of the electrical signal representing the position code dependent on the segment identity and allowing carries to propagate, thereby producing electrical signals representing a position code sum; detecting by machine any electrical signal which represents a carry which propagates from the most significant bit position of the electrical signal which represents the position code; producing by machine an electrical shift signal in response to the carry detection and dependent on the segment identity; shifting by machine electrical signals representing the position code in response to the shift signal; and decrementing by machine electrical signals representing the segment code in response to the inverse of the shift signal.

Claim 15

The machine attenuation method performed on a nonlinearly encoded pulse code modulation signal including electrical signals representing position and segment codes comprising the steps of: decoding by machine electrical signals representing the segment code, thereby determining the identity of the segment; decrementing by machine electrical signals representing the segment code by one; selectively adding by machine an electrical signal representing a one to a selected bit position of the electrical signal representing the position code and the electrical signal representing the decremented segment code dependent on the identity of the segment and allowing carries to propagate from the most significant bit position of the electrical signal representing the position code to the least significant bit position of the electrical signal representing the segment code, thereby producing electrical signals representing a position code sum; detecting by machine an electrical signal representing any change which occurs in the least significant bit position of the electrical signals representing the segment code as a result of the above recited steps; producing by machine an electrical shift signal in response to any said change; and shifting by machine electrical signals representing the position code sum in response to the shift signal.

Claim 16

The machine attenuation method performed on a nonlinearly encoded pulse code modulation signal including electrical signals representing position and segment codes comprising the steps of: decoding by machine electrical signals representing the segment code, thereby determining the identity of the segment; decrementing by machine electrical signals representing the segment code by one; selectively adding by machine an electrical signal representing a one to a selected bit position of the electrical signal representing the position code and the electrical signal representing the decremented segment code dependent on the identity of the segment and allowing carries to propagate from the most significant bit position of the electrical signal representing the position code to the least significant bit position of the electrical signal representing the segment code, thereby producing electrical signals representing a position code sum; detecting by machine an electrical signal representing any change which occurs in the least significant bit position of the electrical signals representing the segment code as a result of the above recited steps; producing by machine an electrical shift signal in response to any said change; and shifting by machine electrical signals representing the position code sum in response to the shift signal.

Claim 17

Apparatus for uniformly reducing the amplitude of a nonlinearly encoded analog signal, said signal being represented by a segment code and a position code, which comprises: a decoder which operates on the segment code to produce an output on a selected one of a multiplicity of leads dependent on the identity of the segment, an adder, having provisions for carry propagation, which combines the position code and the output appearing on the leads from the decoding circuit, a control circuit responsive to the adder which selectively produces a shift control signal, a shift-one circuit which selectively operates on the output of the adder in response to the shift control signals, and a subtractor for selectively decrementing the segment code by one in response to the shift control signal.

Claim 18

Apparatus for uniformly reducing the amplitude of a nonlinearly encoded analog signal, said signal being represented by a segment code and a position code, which comprises: a decoder which operates on the segment code to produce an output on a selected one of a multiplicity of leads dependent on the identity of the segment, an adder, having provisions for carry propagation, which combines the position code and the output appearing on the leads from the decoding circuit, a control circuit responsive to the adder which selectively produces a shift control signal, a shift-one circuit which selectively operates on the output of the adder in response to the shift control signals, and a subtractor for selectively decrementing the segment code by one in response to the shift control signal.

Claim 19

Apparatus for uniformly reducing the amplitude of a nonlinearly encoded analog signal, said signal being represented by a segMent code and a position code, which comprises: a decoder which operates on the segment code to produce an output on a selected one of a multiplicity of leads dependent on the identity of the segment, an adder, having provisions for carry propagation, which combines the position code and the output appearing on the leads from the decoding circuit, a control circuit responsive to the adder which selectively produces a shift control signal, a shift-one circuit which selectively operates on the output of the adder in response to the shift control signals, and a subtractor which uniformly decrements the segment code by one, wherein said adder includes means for selectively incrementing the decremented segment code in response to said decoder.

Claim 20

Apparatus for uniformly reducing the amplitude of a nonlinearly encoded analog signal, said signal being represented by a segMent code and a position code, which comprises: a decoder which operates on the segment code to produce an output on a selected one of a multiplicity of leads dependent on the identity of the segment, an adder, having provisions for carry propagation, which combines the position code and the output appearing on the leads from the decoding circuit, a control circuit responsive to the adder which selectively produces a shift control signal, a shift-one circuit which selectively operates on the output of the adder in response to the shift control signals, and a subtractor which uniformly decrements the segment code by one, wherein said adder includes means for selectively incrementing the decremented segment code in response to said decoder.