Binary data transmission system and clocking means therefor

Claim 1

A serial binary data transmission system comprising a transmission line, a master clock for providing timing pulses at the data rate and at least two transmit-receive stations connected to said transmission line and a binary data signal source means, wherein the two binary data states are represented respectively by unipolar signals having a ground potential and a first potential relative to ground and wherein said clock includes means for producing a unipolar clock signal which alternates between ground and the opposite potential relative to said data signal, means for providing a start pulse prior to any message transmission wherein the width of the data, clock and start pulses is up to one half the width of the allotted pulse period, each said station including means for combining the data and clock signals to form a composite signal so that a first binary state is represented in the composite signal by a unipolar pulse that is of substantially the same duration as a clock pulse and of a first polarity with respect to ground and wherein the other binary state is represented by a pulse of substantially the same duration as a clock pulse and of the opposite polarity with respect to ground, said station further including means for separating the components of said composite transmitted signal into two separate sets wherein one of said separate sets represents the original input data signal, and the other set represents the clock signal and means for reversing the polarity of said data set and for combining the two rectified signal sets to produce a composite unipolar clock signal and wherein each said transmit-receive station contains a receiving and a transmitting serial memory means and means for serially entering binary data in and extracting data from said serial memory means under control of said clock signals.