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US3686513A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage ratio circuit

Assignee: Honeywell Inc
•
Filing: 1971-08-09
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Granted: 1972-08-22
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Expires: 1991-08-09
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Abstract

Abstract A ratio computing circuit for determining the ratio of two input signals by using a first input signal to preset the resistance of a field-effect transistor. The transistor resistance is connected to a summing junction algebraically summing a reference signal with a signal developed by the first input signal through the transistor resistance. An input of an amplifier is connected to the summing junction while the amplifier output is used to control the transistor resistance to reduce the net signal to a zero level. A capacitor is used to store the output signal from the amplifier. A plurality of concurrently operated switching means are arranged to replace the first input signal with a second input signal while connecting an output of the amplifier to the summing junction to replace the reference signal and to an output terminal. The capacitor is used to retain the transistor resistance at its former value whereby the signal on the output terminal is the ratio of the two input signals.

Inventors

  • 👤 Robert L Miller

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 19:55
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/161

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 219 words
A ratio computing circuit comprising a first input terminal; a second input terminal; a variable impedance means; a first switching means having a first switch state for selectively connecting said first input terminal to a first side of said variable impedance means and a second switch state for connecting said second input terminal to said first side; a summing junction connected to a second side of said impedance means; amplifier means having an input connected to said summing junction to amplify an output signal from said summing junction; constant impedance means having an output connected to said summing junction; capacitor means connected to said summing junction; second switching means having a first switch state to selectively connect an output signal from said amplifier means to said variable impedance means to control the impedance thereof and a second switch state to connect an input of said constant impedance means to said amplifier output signal; reference signal means; output terminal means; third switch means having a first switch position for connecting said input of said conStant impedance means to said reference signal means and a second switch position for connecting said input of said constant impedance to said output terminal means; and actuating means for synchronously operating said first, second and third switch means between their first and second switch states.
Claim 2
Dependent Claim 219 words
A ratio computing circuit comprising a first input terminal; a second input terminal; a variable impedance means; a first switching means having a first switch state for selectively connecting said first input terminal to a first side of said variable impedance means and a second switch state for connecting said second input terminal to said first side; a summing junction connected to a second side of said impedance means; amplifier means having an input connected to said summing junction to amplify an output signal from said summing junction; constant impedance means having an output connected to said summing junction; capacitor means connected to said summing junction; second switching means having a first switch state to selectively connect an output signal from said amplifier means to said variable impedance means to control the impedance thereof and a second switch state to connect an input of said constant impedance means to said amplifier output signal; reference signal means; output terminal means; third switch means having a first switch position for connecting said input of said conStant impedance means to said reference signal means and a second switch position for connecting said input of said constant impedance to said output terminal means; and actuating means for synchronously operating said first, second and third switch means between their first and second switch states.
Claim 3
Dependent Claim 46 words
A ratio computing circuit as set forth in claim 1 wherein said variable impedance means is a field-effect transistor and said first state of said second switch means is arranged to apply an output signal from said amplifier means to a gate electrode of said transistor.
Claim 4
Dependent Claim 17 words
A ratio circuit as set forth in claim 2 wherein said constant impedance means is a resistor.

References Cited (Backward Citations)

US3476924A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-08-22 1976-02-21 1976-08-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-08-22 1980-02-21 1980-08-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-08-22 1984-02-21 1984-08-22 $7700.00 Window Closed / Lapsed

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