US3686443A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Supervisory signalling in pcm telephone system
Assignee: Telent Technologies Services Ltd
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Filing: 1971-01-04
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Granted: 1972-08-22
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Expires: 1991-01-04
Abstract
Abstract In a T-carrier system of the kind in which supervisory signals are transmitted only in selected frames and not in others, signalling pulses are generated at the receiver during frames in which they are not transmitted, thereby enabling use of a signalling detector designed for operation in systems in which the signalling information is transmitted in every frame.
Inventors
- 👤 Paul K Kavanaugh
- 👤 Michael A Boehly
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 15:12
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/12; H04J3/125
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
151 words
A signal synthesizing circuit for use in the receiver of a pulse code modulated signal transmission system of the T-carrier type in which supervisory signals are transmitted only in selected frames and not in others comprising: a. a shift register connected to advance one step at the beginning of each channel signalling time slot, b. first gate means for applying signalling bits to said shift register, c. recirculating gate means for applying the output signals of said shift register to its input, d. a counter arranged to produce an output signal during and equal in duration to the selected frames, and e. gate means responsive to said counter for selectively enabling and inhibiting said first gate means and said recirculating gate means to apply signalling pulses from the incoming pulse train to said shift register during the selected frames, and to recirculate signals in said shift register during the other frames.
Claim 2
Dependent Claim
151 words
A signal synthesizing circuit for use in the receiver of a pulse code modulated signal transmission system of the T-carrier type in which supervisory signals are transmitted only in selected frames and not in others comprising: a. a shift register connected to advance one step at the beginning of each channel signalling time slot, b. first gate means for applying signalling bits to said shift register, c. recirculating gate means for applying the output signals of said shift register to its input, d. a counter arranged to produce an output signal during and equal in duration to the selected frames, and e. gate means responsive to said counter for selectively enabling and inhibiting said first gate means and said recirculating gate means to apply signalling pulses from the incoming pulse train to said shift register during the selected frames, and to recirculate signals in said shift register during the other frames.
Claim 3
Dependent Claim
36 words
A signal synthesizing circuit according to claim 1 wherein the output of said first gate means is applied to said counter to clear it during frames in which binary ones appear in the signalling time slots.
Claim 4
Dependent Claim
176 words
A signal synthesizing circuit for use in the receiver of a pulse code modulated signal transmission system of the T-carrier type iN which supervisory signals are transmitted only in selected frames and not in others comprising: a. a shift register connected to advance one step at the beginning of each channel signalling time slot, b. first gate means for applying signalling bits to said shift register, c. recirculating gate means for applying the output signals of said shift register to its input, d. a counter arranged to produce an output signal during and equal in duration to the selected frames, e. gate means responsive to said counter for selectively enabling and inhibiting said first gate means and said recirculating gate means to apply signalling pulses from the incoming pulse train to said shift register during the selected frames, and to recirculate signals in said shift register during the other frames, and f. an OR gate for applying the outputs of said shift register and of said first gate means to the channel distributor of the receiver.
Claim 5
Dependent Claim
176 words
A signal synthesizing circuit for use in the receiver of a pulse code modulated signal transmission system of the T-carrier type iN which supervisory signals are transmitted only in selected frames and not in others comprising: a. a shift register connected to advance one step at the beginning of each channel signalling time slot, b. first gate means for applying signalling bits to said shift register, c. recirculating gate means for applying the output signals of said shift register to its input, d. a counter arranged to produce an output signal during and equal in duration to the selected frames, e. gate means responsive to said counter for selectively enabling and inhibiting said first gate means and said recirculating gate means to apply signalling pulses from the incoming pulse train to said shift register during the selected frames, and to recirculate signals in said shift register during the other frames, and f. an OR gate for applying the outputs of said shift register and of said first gate means to the channel distributor of the receiver.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-08-22 | 1976-02-21 | 1976-08-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-08-22 | 1980-02-21 | 1980-08-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-08-22 | 1984-02-21 | 1984-08-22 | $7700.00 | Window Closed / Lapsed |