US3685140A
Expired / Lapsed
US
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Short channel field-effect transistors
Assignee: General Electric Co
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Filing: 1969-10-03
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Granted: 1972-08-22
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Expires: 1989-10-03
Abstract
Abstract An improved field-effect transistor having an exceedingly short channel length is described wherein a single edge defines the boundaries of both the source and drain regions. In one embodiment a gate electrode is formed over a thin oxide layer deposited on a semiconductor wafer of a first-conductivity type. An opposite-conductivity type impurity is diffused into the wafer adjacent the gate electrode. A first-conductivity-type impurity is diffused within the opposite-conductivity-type region forming a field-effect transistor having one edge of the gate electrode defining the boundary between the source and channel and the drain and channel regions. In another embodiment an edge of an insulating layer defines the boundaries of the source and drain regions. A method for fabricating isolated resistance elements is also disclosed.
Inventors
- 👤 William E Engeler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 15:57
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/63; H10D30/01; H10D30/021; H10D30/025; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10P; H10P95/00; H10D62/124; H10D62/126; H10D62/127; H10D64/00; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/514; H10D64/516; H10D64/517; H10D64/519; H10D64/60; H10D64/66; H10D64/661; H10D64/665; H10W; H10W72/00; H10W72/50; H10W72/531; H10W72/536; Y; Y10; Y10S; Y10S148/00; Y10S148/053; Y10S148/106; Y10S148/151
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
131 words
A method of making an insulated field-effect transistor having a short channel region comprising: forming an insulating layer over a semi-conductor wafer having a major portion of a first-conductivity type; forming a gate electrode over said insulating layer; diffusing an opposite conductivity type impurity into said wafer to form a surface-adjacent substrate region therein in the vicinity of said gate electrode; diffusing a first conductivity type impurity within the substrate from a patterned activator-doped insulating layer overlying a portion of said substrate diffusion region in the vicinity of said edge of said gate electrode to produce a drain region therein, the remaining opposite conductivity-type region forming said short channel region covered by a portion of said gate electrode; and forming electrical contacts to said different conductivity-type regions and said gate electrode.
Claim 2
Independent Claim
131 words
A method of making an insulated field-effect transistor having a short channel region comprising: forming an insulating layer over a semi-conductor wafer having a major portion of a first-conductivity type; forming a gate electrode over said insulating layer; diffusing an opposite conductivity type impurity into said wafer to form a surface-adjacent substrate region therein in the vicinity of said gate electrode; diffusing a first conductivity type impurity within the substrate from a patterned activator-doped insulating layer overlying a portion of said substrate diffusion region in the vicinity of said edge of said gate electrode to produce a drain region therein, the remaining opposite conductivity-type region forming said short channel region covered by a portion of said gate electrode; and forming electrical contacts to said different conductivity-type regions and said gate electrode.
Claim 3
Dependent Claim
32 words
A method of claim 1 wherein said substrate region is formed by diffusing from a first activator-doped insulating layer overlying said wafer in the vicinity of said edge of said gate electrode.
Claim 4
Dependent Claim
15 words
The method of claim 1 further comprising forming a resistance element in said substrate region.
Claim 5
Dependent Claim
47 words
The method of claim 1 wherein the length of said short channel region underlying said edge of said gate electrode is equal to the difference in extent of lateral diffusion of said substrate region and said drain region with respect to said edge of said gate electrode.
Claim 6
Dependent Claim
17 words
The method of claim 4 wherein the length of said channel region is less than 1 micron.
Claim 7
Independent Claim
177 words
A method of forming a short channel field-effect transistor comprising: forming an insulating film over a major surface of a first-conductivity-type semiconductor wafer; overlaying said insulating film with a conductive film which is non-reactive with said insulating film at conductivity-modifying activator diffusion temperatures; forming a pattern in said conductive film of conductor-removed and conductor-remaining portions, one of said conductor-remaining portions serving as a gate electrode for said field-effect transistor; forming an aperture in said insulating film adjacent an edge of said gate electrode; diffusing a first activator impurity through said aperture to transform the major surface adjacent region of said wafer in the vicinity of said gate electrode to an opposite conductivity-type region; diffusing from a patterned activator-doped insulating film overlying said wafer a second activator impurity into the surface adjacent opposite-conductivity-type diffusion region to transform a portion of the opposite-conductivity-type region to said first-conductivity-type, the remaining opposite-conductivity-type region forming a short channel region covered by a portion of said gate electrode; and forming electrical contacts to each of said different conductivity-type regions and said gate electrode.
Claim 8
Independent Claim
177 words
A method of forming a short channel field-effect transistor comprising: forming an insulating film over a major surface of a first-conductivity-type semiconductor wafer; overlaying said insulating film with a conductive film which is non-reactive with said insulating film at conductivity-modifying activator diffusion temperatures; forming a pattern in said conductive film of conductor-removed and conductor-remaining portions, one of said conductor-remaining portions serving as a gate electrode for said field-effect transistor; forming an aperture in said insulating film adjacent an edge of said gate electrode; diffusing a first activator impurity through said aperture to transform the major surface adjacent region of said wafer in the vicinity of said gate electrode to an opposite conductivity-type region; diffusing from a patterned activator-doped insulating film overlying said wafer a second activator impurity into the surface adjacent opposite-conductivity-type diffusion region to transform a portion of the opposite-conductivity-type region to said first-conductivity-type, the remaining opposite-conductivity-type region forming a short channel region covered by a portion of said gate electrode; and forming electrical contacts to each of said different conductivity-type regions and said gate electrode.
Claim 9
Dependent Claim
62 words
The method of claim 6 wherein said semiconductor wafer is silicon having a surface of P-type conductivity and said first activator impurity is selected from the group consisting of phosphorus, arsenic, antimony and bismuth and said second activator impurity is selected from the group consisting of boron, aluminum, gallium and indium and said field-effect transistor is an N-channel enhancement mode type transistor.
Claim 10
Dependent Claim
62 words
ThE method of claim 6 wherein said semiconductor wafer is silicon having a surface of N-type conductivity and said first activator impurity is selected from the group consisting of boron, aluminum, gallium and indium and said second activator impurity is selected from the group consisting of phosphorus, arsenic, antimony and bismuth and said field-effect transistor is a P-channel enchancement mode type transistor.
Claim 11
Dependent Claim
20 words
The method of claim 1 wherein said edge of said gate electrode defines the boundaries of said short channel region.
Claim 12
Dependent Claim
28 words
The method of claim 1 wherein an edge of said insulating film adjacent said aperture and underlying said gate electrode defines the boundaries of said short channel region.
Claim 13
Dependent Claim
20 words
The method of claim 1 wherein said conductive film is selected from the group consisting of molybdenum, tungsten and silicon.
Claim 14
Dependent Claim
18 words
The method of claim 1 wherein said activator-doped insulating film is extended linearly to form a resistance element.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-08-22 | 1976-02-21 | 1976-08-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-08-22 | 1980-02-21 | 1980-08-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-08-22 | 1984-02-21 | 1984-08-22 | $7700.00 | Window Closed / Lapsed |