US3684920A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Transistorized vertical deflection circuit
Assignee: RCA Licensing Corp
•
Filing: 1970-05-15
•
Granted: 1972-08-15
•
Expires: 1990-05-15
Abstract
Abstract Transistorized vertical deflection circuit employs output stage of class B, push-pull, complementary symmetry configuration. Miller integration approach is used for sawtooth wave generation, with feedback waveform derived from yoke current sampling resistor. Diode, coupled between ground and base of the (NPN) output transistor which conducts during retrace and first half of scan, operates in Zener region during retrace to hold voltage at joined emitters of output pair at s substantially constant voltage during retrace; output waveform is thereby stabilized against effects of B+ changes due to line voltage variations or loading extremes, and remaining (PNP) output transistor dissipation is held substantially constant in the face of such changes. Diode in feedback path, forward biased when retrace ends, ensures rapid turn-on of driver stage when discharge transistor cuts off; oppositely poled diode in shunt with first feedback diode completes low impedance capacitor discharge path during retrace. One winding half of vertical deflection yoke is shunted by a capacitor of a value selected to introduce cancellation of horizontal frequency components across yoke/pincushion circuitry, in order to minimize feedback of interlace-disturbing horizontal components in deflection circuit.
Inventors
- 👤 Lawrence Edward Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 13:19
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; H03K4/60; H03K4/69; H03K4/71
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
230 words
In a television receiver, a vertical deflection circuit comprising, in combination: a vertical deflection output stage including a pair of transistors of opposite conductivity type having their emitter electrodes connected to a common output terminal, their base electrodes connected to an input terminal, and their respective collector electrodes connected to a unidirectional voltage supply terminal and a point of reference potential, respectively, one of said pair of transistors conducting during the initial half of recurring trace intervals and the other conducting during the final half thereof; a vertical deflection yoke winding coupled to said output terminal, flyback pulses appearing across said winding during periodically recurring retrace intervals; a driver transistor having an output electrode; direct current conductive means for coupling said output electrode of said driver transistor to said input terminal of said output stage; means for alternately rendering said driver transistor conducting and nonconducting at a periodic rate, said trace intervals substantially coinciding in time with the periods of conduction by said driver transistor, and said retrace intervals substantially coinciding in time with the periods of nonconduction by said driver transistor; direct current conductive impedance means connected between said supply terminal and said input terminal; and stabilizing means coupled between the base electrode of said one transistor and said point of reference potential for clamping the peaks of said periodically recurring flyback pulses at a substantially constant voltage level.
Claim 2
Dependent Claim
230 words
In a television receiver, a vertical deflection circuit comprising, in combination: a vertical deflection output stage including a pair of transistors of opposite conductivity type having their emitter electrodes connected to a common output terminal, their base electrodes connected to an input terminal, and their respective collector electrodes connected to a unidirectional voltage supply terminal and a point of reference potential, respectively, one of said pair of transistors conducting during the initial half of recurring trace intervals and the other conducting during the final half thereof; a vertical deflection yoke winding coupled to said output terminal, flyback pulses appearing across said winding during periodically recurring retrace intervals; a driver transistor having an output electrode; direct current conductive means for coupling said output electrode of said driver transistor to said input terminal of said output stage; means for alternately rendering said driver transistor conducting and nonconducting at a periodic rate, said trace intervals substantially coinciding in time with the periods of conduction by said driver transistor, and said retrace intervals substantially coinciding in time with the periods of nonconduction by said driver transistor; direct current conductive impedance means connected between said supply terminal and said input terminal; and stabilizing means coupled between the base electrode of said one transistor and said point of reference potential for clamping the peaks of said periodically recurring flyback pulses at a substantially constant voltage level.
Claim 3
Dependent Claim
133 words
Apparatus in accordance with claim 1 wherein the voltage at said unidirectional voltage supply terminal, during operation of said television receiver, is subject to variation over a given range of voltage levels, and wherein said stabilizing means comprises a diode subject to Zener operation at a voltage level below said given range of voltage levels, and means for connecting said diode between the base electrode of said one transistor and said point of reference potential with a poling relative to said unidirectional voltage supply terminal such that said diode is reverse biased; said driver transistor conducting throughout each trace interval to a sufficient degree to hold said diode out of Zener operation so that said diode is subject to Zener operation only during said periodic retrace intervals when said driver transistor is nonconducting.
Claim 4
Dependent Claim
58 words
Apparatus in accordance with claim 2 also including: an additional diode connected between said base electrode of said one transistor and said input terminal, said additional diode being poled for forward conduction during said trace intervals when said driver transistor is conducting; and a capacitor coupled between said output terminal and an intermediate point of said impedance means.
Claim 5
Dependent Claim
163 words
A television receiver vertical deflection circuit comprising, in combination: a class B, push-pull, complementary symmetry transistor output stage including an NPN output transistor conducting during periodic retrace intervals and during the initial half of each intervening trace interval, and a PNP output transiStor conducting during the final half of each of said intervening trace intervals, said output transistors having emitter electrodes connected to a common output terminal and base electrodes connected to a common signal source; a deflection winding coupled to said common output terminal; and means for regulating the voltage at said common output terminal during said periodic retrace intervals, said regulating means comprising a diode, connected between the base electrode of said NPN output transistor and a point of reference potential, and subject to reverse biasing to a first degree insufficent to cause Zener breakdown of said diode during said periodic trace intervals, and to a second degree sufficient to ensure Zener breakdown of said diode during said periodic retrace intervals.
Claim 6
Dependent Claim
163 words
A television receiver vertical deflection circuit comprising, in combination: a class B, push-pull, complementary symmetry transistor output stage including an NPN output transistor conducting during periodic retrace intervals and during the initial half of each intervening trace interval, and a PNP output transiStor conducting during the final half of each of said intervening trace intervals, said output transistors having emitter electrodes connected to a common output terminal and base electrodes connected to a common signal source; a deflection winding coupled to said common output terminal; and means for regulating the voltage at said common output terminal during said periodic retrace intervals, said regulating means comprising a diode, connected between the base electrode of said NPN output transistor and a point of reference potential, and subject to reverse biasing to a first degree insufficent to cause Zener breakdown of said diode during said periodic trace intervals, and to a second degree sufficient to ensure Zener breakdown of said diode during said periodic retrace intervals.
Claim 7
Dependent Claim
81 words
Apparatus in accordance with claim 4 wherein said common signal source comprises a phase inverting deflection wave amplifier having an input terminal, said deflection circuit also including: resistive means in series with said deflection winding for developing a voltage wave at a feedback terminal in response to deflection current traversing said winding; a feedback path for said voltage wave comprising a capacitor coupled between said feedback terminal and said amplifier input terminal; and means for periodically charging and discharging said capacitor.
Claim 8
Dependent Claim
224 words
In a television receiver, a vertical deflection circuit comprising, in combination: a vertical deflection output stage including a pair of transistors of opposite conductivity type having their emitter electrodes connected to a common output terminal, their base electrodes connected to an input terminal, and their respective collector electrodes connected to a unidirectional voltage supply terminal and a point of reference potential, respectively, one of said pair of transistors conducting during the initial half of recurring trace intervals and the other conducting during the final half thereof; a vertical deflection yoke winding coupled to said output terminal, flyback pulses appearing across said winding during periodically recurring retrace intervals; a driver transistor having an output electrode; direct current conductive means for coupling said output electrode of said driver transistor to said input terminal of said output stage; means for alternately rendering said driver transistor conducting and nonconducting at a periodic rate, said trace intervals substantially coinciding in time with the periods of conduction by said driver transistor, and said retrace intervals substantially coinciding in time with the periods of nonconducting said driver transistor; direct current conductive impedance means connected between said supply terminal and said input terminal; and a diode coupled between the base electrode of said one transistor and said point of reference potential, and biased for Zener operation solely during said periodic retrace intervals.
Claim 9
Dependent Claim
224 words
In a television receiver, a vertical deflection circuit comprising, in combination: a vertical deflection output stage including a pair of transistors of opposite conductivity type having their emitter electrodes connected to a common output terminal, their base electrodes connected to an input terminal, and their respective collector electrodes connected to a unidirectional voltage supply terminal and a point of reference potential, respectively, one of said pair of transistors conducting during the initial half of recurring trace intervals and the other conducting during the final half thereof; a vertical deflection yoke winding coupled to said output terminal, flyback pulses appearing across said winding during periodically recurring retrace intervals; a driver transistor having an output electrode; direct current conductive means for coupling said output electrode of said driver transistor to said input terminal of said output stage; means for alternately rendering said driver transistor conducting and nonconducting at a periodic rate, said trace intervals substantially coinciding in time with the periods of conduction by said driver transistor, and said retrace intervals substantially coinciding in time with the periods of nonconducting said driver transistor; direct current conductive impedance means connected between said supply terminal and said input terminal; and a diode coupled between the base electrode of said one transistor and said point of reference potential, and biased for Zener operation solely during said periodic retrace intervals.
References Cited (Backward Citations)
US2964673A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-08-15 | 1976-02-14 | 1976-08-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-08-15 | 1980-02-14 | 1980-08-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-08-15 | 1984-02-14 | 1984-08-15 | $7700.00 | Window Closed / Lapsed |