US3683277A — Communication system for binary coded data

Claim 1

Independent Claim 85 words

In a communication system for serialized bi-level, binarycoded data signals in combination: a. means for producing a substantially square-wave, symmetrical, carrier signal; b. A source of serialized bilevel data signal whose average bit period is substantially equal to 1 cycle of said carrier means for combining said carrier signal with the serialized bi-level data signal to change the phase of the second half of a carrier signal cycle by 180* only when the corresponding data signal is at a predetermined one of its two levels.

Claim 2

Dependent Claim 85 words

In a communication system for serialized bi-level, binarycoded data signals in combination: a. means for producing a substantially square-wave, symmetrical, carrier signal; b. A source of serialized bilevel data signal whose average bit period is substantially equal to 1 cycle of said carrier means for combining said carrier signal with the serialized bi-level data signal to change the phase of the second half of a carrier signal cycle by 180* only when the corresponding data signal is at a predetermined one of its two levels.

Claim 3

Dependent Claim 49 words

The invention as set forth in claim 1 wherein said signal combining means includes: gating means having said carrier signal, said data signal and a strobing signal as inputs; and means coupled to the output of said gating means for reproducing the carrier signal phase-modulated by the data signal.

Claim 4

Dependent Claim 16 words

The invention as set forth in claim 2 wherein said latter means comprises bistable switching means.

Claim 5

Dependent Claim 26 words

The invention as set forth in claim 3 wherein said strobing signal is a series of pulses occurring at twice the frequency of said carrier signal.

Claim 6

Dependent Claim 48 words

The invention as set forth in claim 4 wherein said gating means comprises: a first gating circuit having said data signal and said carrier signal as its inputs; and a second gating circuit having the output of said first gating circuit and said strobe signal as its inputs.

Claim 7

Dependent Claim 41 words

The invention as set forth in claim 5 wherein the output of said second gating circuit is coupled to the input of said bistable switching means, the output of the latter constituting the reproduced carrier signal phase-modulated by said data signal.

Claim 8

Dependent Claim 79 words

In a binary-coded digital-data communication system, the steps of: producing a fixed frequency carrier signal having substantially symmetrical, square-wave cycles; producing a series of bilevel data signals representing respective bit values and having average bit periods substantially equal to the period of a carriercycle; and combining each data signal with a carrier signal cycle to eliminate the intermediate transition during the cycle period of the latter only when the corresponding data signal is a selected one of its levels.

Claim 9

Dependent Claim 79 words

In a binary-coded digital-data communication system, the steps of: producing a fixed frequency carrier signal having substantially symmetrical, square-wave cycles; producing a series of bilevel data signals representing respective bit values and having average bit periods substantially equal to the period of a carriercycle; and combining each data signal with a carrier signal cycle to eliminate the intermediate transition during the cycle period of the latter only when the corresponding data signal is a selected one of its levels.

Claim 10

Dependent Claim 46 words

The invention as set forth in claim 7 further including the steps of: sensing the combined carrier-data signal to determine the presence or absence of an intermediate transition in each carrier cycle period, and producing a signal indication of the bit value of each sensed signal.

Claim 11

Dependent Claim 101 words

In a digital data communication system, the combination comprising: means for producing a binary data signal train comprising a series of bilevel signals having equal time periods with the start of each time period being denoted by a transition between levels and the binary value being represented by the presence or absence of an intermediate transition during a time period; means for receiving said signal train and for sensing the occurrence of each transition; timing means; and means responsive to said sensing means for initiating said timing means at a preset starting point whenever a transition occurs in said signal train.

Claim 12

Dependent Claim 101 words

In a digital data communication system, the combination comprising: means for producing a binary data signal train comprising a series of bilevel signals having equal time periods with the start of each time period being denoted by a transition between levels and the binary value being represented by the presence or absence of an intermediate transition during a time period; means for receiving said signal train and for sensing the occurrence of each transition; timing means; and means responsive to said sensing means for initiating said timing means at a preset starting point whenever a transition occurs in said signal train.

Claim 13

Dependent Claim 33 words

The invention as in claim 9 further including: means coupled to said timing means for producing a signal output only when said timing means reaches a predetermined time interval from said starting point.

Claim 14

Dependent Claim 48 words

The invention as set forth in claim 9 wherein said signal producing means produces said signal train having an intermediate transition representing a first binary value and the absence of an intermediate transition representing a second binary value, said intermediate transition occurring at approximately one-half a time period.

Claim 15

Dependent Claim 53 words

The invention as set forth in claim 11 further including: means coupled to said timing means for producing a signal output indicating the occurrence of a second binary value when said timing means reaches an interval substantially beyond one-half a data bit time period but less than a complete data bit time period.

Claim 16

Dependent Claim 61 words

The invention as set forth in claim 12 wherein said receiving and sensing means comprises: means for receiving said signal train and for producing a signal indication for either a negative-going or positive-going transition in said signal train; and means coupled to said receiving means responsive to said transition signal indication for producing an output pulse signal whenever a transition occurs.

Claim 17

Dependent Claim 31 words

The invention as set forth in claim 9 wherein: said timing means comprises a binary counter; said sensing means initiating said timing means by clearing the counter when a transition occurs.

Claim 18

Dependent Claim 96 words

The invention as set forth in claim 14 further including: counter gating means; means for feeding a series of toggling pulses into said gating means, said toggling pulses occurring at a frequency substantially greater than the frequency substantially greater than the frequency of said data signal train; means for coupling said transition output pulse to an input of said gating means; and means for coupling the output of said gating means to the input of said counter hwereby the toggling of said counter is momentarily interrupted when a transition in the input data signal train occurs.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1975-08-08	1976-02-07	1976-08-08	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1979-08-08	1980-02-07	1980-08-08	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	1983-08-08	1984-02-07	1984-08-08	$7700.00	Window Closed / Lapsed

Communication system for binary coded data

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