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US3680110A Expired / Lapsed US ⏱️ 0.0 years remaining

Analog ferrite phase shifter control circuit

Assignee: Raytheon Co
•
Filing: 1970-10-14
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Granted: 1972-07-25
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Expires: 1990-10-14
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Abstract

Abstract A control circuit for analog ferrite phase shifters in an antenna array wherein such phase shifters are arranged in rows and columns. The circuit includes a recirculating shift register for each row, each such register repetitively producing a ''''start'''' current flow signal for the phase shifters in each row and a recirculating shift register for each column, each such register repetitively producing a ''''stop'''' current flow signal for the phase shifters in each column. The various recirculating shift registers are programmed so that the time between the ''''start'''' and the ''''stop'''' current flow signal to each one of the phase shifters results in the proper average current to accomplish collimation and deflection of the beam from the antenna array.

Inventors

  • 👤 Bertram J Goldstone

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 13:45
CPC Classifications
H; H01; H01Q; H01Q3/00; H01Q3/26; H01Q3/30; H01Q3/34; H01Q3/36

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 273 words
In a control circuit for repetitively actuating and deactuating, in response to the repetitive occurrence of binary signals, each one of a plurality of electric current switching means, each one thereof being in circuit with a different one of a like plurality of analog ferrite phase shifters, such switching means and phase shifters being arranged in rows and columns corresponding to the radiating elements of an antenna array, the improvement comprising: a. a first plurality of recirculating shift registers, the number thereof being equal to the number of rows of electric current switching means; b. a second plurality of recirculating shift registers, the number thereof being equal to the number of columns of electric current switching means; c. means for connecting the output stage of a different one of the recirculating shift registers in the first plurality thereof to the actuating terminals of the electric current switching means in each different row thereof and for connecting the output stage of a different one of the recirculating shift registers in the second plurality thereof to the deactuating terminals of the electric current switching means in each column thereof; d. programming means for initially shifting a binary ''''one'''' from the input stage of each recirculating shift register to an intermediate stage thereof, the particular intermediate stage in each such register to which the binary ''''one'''' is shifted being varied to change the time of actuation and deactuation of each one of the electric switch means; and, e. clocking means to shift the binary ''''one'''' in each recirculating shift register from its initial intermediate stage to the last stage and to recirculate repetitively such binary ''''one''''.
Claim 2
Dependent Claim 273 words
In a control circuit for repetitively actuating and deactuating, in response to the repetitive occurrence of binary signals, each one of a plurality of electric current switching means, each one thereof being in circuit with a different one of a like plurality of analog ferrite phase shifters, such switching means and phase shifters being arranged in rows and columns corresponding to the radiating elements of an antenna array, the improvement comprising: a. a first plurality of recirculating shift registers, the number thereof being equal to the number of rows of electric current switching means; b. a second plurality of recirculating shift registers, the number thereof being equal to the number of columns of electric current switching means; c. means for connecting the output stage of a different one of the recirculating shift registers in the first plurality thereof to the actuating terminals of the electric current switching means in each different row thereof and for connecting the output stage of a different one of the recirculating shift registers in the second plurality thereof to the deactuating terminals of the electric current switching means in each column thereof; d. programming means for initially shifting a binary ''''one'''' from the input stage of each recirculating shift register to an intermediate stage thereof, the particular intermediate stage in each such register to which the binary ''''one'''' is shifted being varied to change the time of actuation and deactuation of each one of the electric switch means; and, e. clocking means to shift the binary ''''one'''' in each recirculating shift register from its initial intermediate stage to the last stage and to recirculate repetitively such binary ''''one''''.

References Cited (Backward Citations)

US3484785A Cited
US3582953A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-07-25 1976-01-24 1976-07-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-07-25 1980-01-24 1980-07-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-07-25 1984-01-24 1984-07-25 $7700.00 Window Closed / Lapsed

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