← Back to Patent Explorer
US3680104A Expired / Lapsed US ⏱️ 0.0 years remaining

Phase reversal pulse modulator and pulse compression filter for a coherent radar

Assignee: United States Department of the Navy
•
Filing: 1970-07-22
•
Granted: 1972-07-25
•
Expires: 1990-07-22
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A coherent, 13 bit phase reversal pulse modulator and pulse compression filter for increasing the range resolution of a coherent radar. The transmitted pulse is subdivided into equal duration bits, and as the pulse is being formed each bit may or may not be shifted in phase determined by a digital code generator. The range resolution of which this pulse reversal modulated pulse is capable is achieved by processing the radar return signal in an approximation to a matched filter.

Inventors

  • 👤 Thomas A Westaway

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 08:16
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/02; G01S13/06; G01S13/08; G01S13/10; G01S13/26; G01S13/28; G01S13/284; G01S13/288

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 152 words
A phase reversal modulator and pulse compression filter for a radar comprising: a stable source of pulses; frequency multiplier means connected to the source of pulses to provide pulses at a desired frequency higher than the stable source; a first hybrid junction for receiving the output of the multiplier and dividing it into two equal outputs; a first RF switch connected to one of the hybrid junction outputs; a 180* phase shifter connected to the other hybrid junction output; a second RF switch connected to the phase shifter so that the inputs of the first and second RF switches are 180* out of phase; a digital unit for operating the two RF switches; a second hybrid junction for combining the outputs from the two RF switches to produce a coded pulse output for the radar; and a pulse compression filter also operated by the digital unit for compressing the radar return pulses.
Claim 2
Dependent Claim 152 words
A phase reversal modulator and pulse compression filter for a radar comprising: a stable source of pulses; frequency multiplier means connected to the source of pulses to provide pulses at a desired frequency higher than the stable source; a first hybrid junction for receiving the output of the multiplier and dividing it into two equal outputs; a first RF switch connected to one of the hybrid junction outputs; a 180* phase shifter connected to the other hybrid junction output; a second RF switch connected to the phase shifter so that the inputs of the first and second RF switches are 180* out of phase; a digital unit for operating the two RF switches; a second hybrid junction for combining the outputs from the two RF switches to produce a coded pulse output for the radar; and a pulse compression filter also operated by the digital unit for compressing the radar return pulses.
Claim 3
Dependent Claim 16 words
The device of claim 1 wherein the stable source of pulses is a crystal controlled oscillator.
Claim 4
Dependent Claim 37 words
The device of claim 2 wherein the digital unit comprises: means for generating a binary pattern in response to a coded input; and, means connected to said generating means for setting a code into said generating means.
Claim 5
Dependent Claim 54 words
The device of claim 3 wherein: the generating means comprises a binary shift register pattern generator having a plurality of inputs; and, the code setting means comprises a plurality of two position switches, each switch being connected to one of the shift register pattern generator inputs, the positions of the switches determining the code.
Claim 6
Dependent Claim 36 words
The device of claim 4 wherein the digital unit includes a parallel to serial shift register connected to the binary shift register pattern generator to produce an output equal sequentially to the output of the generator.
Claim 7
Dependent Claim 49 words
The device of claim 5 wherein the digital unit includes a first means to connect the serial shift register to the first RF switch and a second means to connect the serial shift register to the second RF switch, according to the binary output of the serial shift register.
Claim 8
Dependent Claim 73 words
The device of claim 6 wherein the pulse compression filter includes: a delay line having a plurality of sections; a plurality of tap amplifiers spaced along the delay line, each individual tap amplifier being disposed between two adjacent sections of the delay line, there being the same number of amplifiers as there are bits in the transmitted pulse; and, means to apply a return echo pulse to the front of the delay line.
Claim 9
Dependent Claim 36 words
The device of claim 7 wherein the pulse compression filter includes: an RF switch connected to each tap amplifier; a hybrid junction connected to each RF switch; and a buffer amplifier connected to each hYbrid junction.
Claim 10
Dependent Claim 32 words
The device of claim 8 wherein the pulse compression filter includes means to connect each of the RF switches in the filter to a shaft register pattern generator in the binary unit.
Claim 11
Dependent Claim 31 words
The device of claim 9 wherein the pulse compression filter includes: a summing circuit connected to all of the buffer amplifiers; and output means connected to the summing circuit pulse output.

References Cited (Backward Citations)

US3090953A Cited
US3217324A Cited
US3223999A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-07-25 1976-01-24 1976-07-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-07-25 1980-01-24 1980-07-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-07-25 1984-01-24 1984-07-25 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag