US3678404A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Linear amplifier circuit
Assignee: US Philips Corp
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Filing: 1970-06-08
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Granted: 1972-07-18
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Expires: 1990-06-08
Abstract
Abstract A linear amplifier circuit comprising two stages; each stage further comprising two transistors traversed in series by the same current. Cross coupling between the two stages avoid deviations from linearity of the amplifier due to differences in the base-emitter voltages of the transistors. The circuit is suitable for use in integrated circuits.
Inventors
- 👤 Dirk Blom
- 👤 Adrianus Johannes Wil Overbeek
- 👤 Wilhelmus Antonius Jos Zwijsen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 07:50
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/26; H03F1/00; H03F1/32; H03F1/3211; H03F3/34; H03F3/343; H03F3/42; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45098; H03F3/45103; H03F2203/00; H03F2203/45; H03F2203/45176; H03F2203/45251; H03F2203/45318
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
153 words
A linear amplifier circuit comprising two transistor series circuit arrangements, each of said transistor arrangements comprising first and second junction transistors having their emitter-collector paths traversed by the same current, input voltage sources connected to the base of the first transistors of each arrangement, a voltage source connected in parallel with said transistor arrangements, the first transistors of each arrangement having their collectors connected to one terminal of said voltage source and their emitters connected to the collectors of the second transistors in their respective arrangements and the bases of the second transistors in the other arrangements, current sources, the emitters of the second transistors in each arrangement being connected through said current sources to the other terminal of said voltage source thereby providing undistorted signals proportional to said input voltage sources, and an impedance between the emitters of the second transistors of each arrangement for determining the current amplification of said circuit.
Claim 2
Dependent Claim
153 words
A linear amplifier circuit comprising two transistor series circuit arrangements, each of said transistor arrangements comprising first and second junction transistors having their emitter-collector paths traversed by the same current, input voltage sources connected to the base of the first transistors of each arrangement, a voltage source connected in parallel with said transistor arrangements, the first transistors of each arrangement having their collectors connected to one terminal of said voltage source and their emitters connected to the collectors of the second transistors in their respective arrangements and the bases of the second transistors in the other arrangements, current sources, the emitters of the second transistors in each arrangement being connected through said current sources to the other terminal of said voltage source thereby providing undistorted signals proportional to said input voltage sources, and an impedance between the emitters of the second transistors of each arrangement for determining the current amplification of said circuit.
Claim 3
Dependent Claim
16 words
A linear amplifier circuit as claimed in claim 1 wherein said impedance is a variable resistor.
Claim 4
Dependent Claim
34 words
A linear amplifier circuit as claimed in claim 1 further comprising transistors in the collector circuits of the first transistors in each arrangement, said collector circuit transistors having bases operating at a fixed potential.
Claim 5
Dependent Claim
148 words
A linear amplifier circuit comprising two transistor series circuit arrangements, each of said transistor arrangements comprising first and second junction transistors having their emitter-collector paths traversed by the same current, the bases of the first transistors of each arrangement are connected together, input voltage sources connected between the emitters of the second transistors of each arrangement thereby providing undistorted signals limited by the impedance of said input voltage sources, a voltage source connected in parallel with said transistor arrangements, the first transistors of each arrangement having their collectors connected to one terminal of said voltage source and their emitters connected to the collectors of the second transistors in their respective arrangements and the bases of the second transistors in the other arrangements, and current sources, the emitters of the second transistors in each arrangement being connected through said current sources to the other terminal of said voltage source.
Claim 6
Dependent Claim
148 words
A linear amplifier circuit comprising two transistor series circuit arrangements, each of said transistor arrangements comprising first and second junction transistors having their emitter-collector paths traversed by the same current, the bases of the first transistors of each arrangement are connected together, input voltage sources connected between the emitters of the second transistors of each arrangement thereby providing undistorted signals limited by the impedance of said input voltage sources, a voltage source connected in parallel with said transistor arrangements, the first transistors of each arrangement having their collectors connected to one terminal of said voltage source and their emitters connected to the collectors of the second transistors in their respective arrangements and the bases of the second transistors in the other arrangements, and current sources, the emitters of the second transistors in each arrangement being connected through said current sources to the other terminal of said voltage source.
Claim 7
Dependent Claim
87 words
A linear amplifier circuit as claimed in claim 1 wherein each of said transistor arrangements comprises a plurality of first and second transistor stages in cascade, the bases of the first and second transistors of successive stages being connected to the emitters of the first and second transistors of the preceding stage of the same arrangements, respectively, the emitters of the first transistor of the last stage of each arrangement being connected to the bases of the second transistors in the first stage of the other aRrangement.
Claim 8
Dependent Claim
37 words
A linear amplifier circuit as claimed in claim 1 wherein the emitters of the second transistors in each arrangement is connected to the bases of the first transistors of corresponding arrangements of a second linear amplifier circuit.
References Cited (Backward Citations)
US3178647A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-18 | 1976-01-17 | 1976-07-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-18 | 1980-01-17 | 1980-07-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-18 | 1984-01-17 | 1984-07-18 | $7700.00 | Window Closed / Lapsed |