Vertical locking circuit

Abstract

Abstract A circuit for deriving accurate vertical time reference signals for locking or driving television apparatus, e.g., synchronization generators, to a composite video signal. The circuit also reduces errors due to noise, and permits vertical timing advances of up to two horizontal timing increments. The pulses of a synchronized pulse train each initiates the generation of a continuous ramp function which returns to its initial potential when the initiating pulse ends. If the sync pulse has a sufficient duration such as is characteristic of the vertical sync pulses, the ramp function will reach a threshold level. A comparator in response to the ramp function reaching a threshold level initiates a pulse and, when the ramp function returns to its initial potential, terminates the pulse. This threshold derived pulse is delivered to a flip-flop which changes state at the termination time. The flip-flop produces a pulse having a leading edge coincident with the trailing edge of the ramp function, the threshold pulse, and consequently with the trailing edge of the vertical sync pulses. The threshold pulse is also fed to a mono-pulse generator which produces a signal having a duration equal to or greater than the vertical sync interval or three horizontal time increments. A counter consisting of the aforementioned flip-flop and two additional flip-flops counts six pulses fed thereto by the comparator after which it generates an output pulse. The pulses from the counter and the mono-pulse are fed to an ''''and'''' circuit which gates the pulse only if both the mono-pulse and the counter output are simultaneously inputs. The leading edge of the pulse from the ''''and'''' gate is coincident with the trailing edge of the last vertical sync pulse. Thus, this edge defines an accurate time to which the television apparatus may be locked or driven.

Inventors

• 👤 Buck C Brown

Bibliographic Details