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US3676878A
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Variable monitoring system
Assignee: Ametek Inc
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Filing: 1968-10-14
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Granted: 1972-07-11
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Expires: 1988-10-14
Abstract
Abstract An alarm system for monitoring a large number of variables and for producing a permanent printed record of the exact times when variables changed their state. A scanner counter periodically scans a plurality of annunciator circuits, each of which is associated with a variable. Whenever the scanner locates an annunciator circuit whose state indicates that the associated variable has changed its state since the last scan, the number of the associated variable is retrieved from the scanner counter and the time in seconds and fractions of a second is retrieved from a counter clock. This data and other data is assembled and fed serially into an expandable shift register memory. A teleprinter output logic circuit then retrieves the data from the other end of the expandable memory and feeds it slowly to a teleprinter, along with the time in minutes and hours, and the date in days.
Inventors
- 👤 Kenneth C Linder
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 03:07
CPC Classifications
G; G08; G08B; G08B26/00; G08B26/008; G07; G07C; G07C3/00; G07C3/02; G07C3/04; G07C3/045
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
192 words
A variable monitoring system comprising: a plurality of annunciator circuits each associated with a monitored variable and able to generate signals indicating the state of the monitored variable and also indicating a change in the state of the monitored variable; scanning means, including a scanner counter, connected to the condition responsive circuits for extracting signals from each of the condition responsive circuits sequentially as the scanner counter advances; event logic means for analyzing the extracted signals and for initiating a data collection each time a condition responsive circuit is found to be generating signals indicating a change in the state of the monitored variable; a clock; an assembly shift register in which data can be collected having parallel inputs and a serial output, said parallel inputs including inputs from the scanner counter and from the clock; assembly register control means activated by said event logic for controlling the loading of data into said assembly shift register; a shift register memory connected to the output of said assembly shift register; and output logic means for feeding data out of the shift register memory at a low speed and for recording the data permanently.
Claim 2
Dependent Claim
192 words
A variable monitoring system comprising: a plurality of annunciator circuits each associated with a monitored variable and able to generate signals indicating the state of the monitored variable and also indicating a change in the state of the monitored variable; scanning means, including a scanner counter, connected to the condition responsive circuits for extracting signals from each of the condition responsive circuits sequentially as the scanner counter advances; event logic means for analyzing the extracted signals and for initiating a data collection each time a condition responsive circuit is found to be generating signals indicating a change in the state of the monitored variable; a clock; an assembly shift register in which data can be collected having parallel inputs and a serial output, said parallel inputs including inputs from the scanner counter and from the clock; assembly register control means activated by said event logic for controlling the loading of data into said assembly shift register; a shift register memory connected to the output of said assembly shift register; and output logic means for feeding data out of the shift register memory at a low speed and for recording the data permanently.
Claim 3
Dependent Claim
46 words
A variable monitoring system in accordance with claim 1 and including a code number generator connected to the event logic and to the inputs of the assembly shift register for adding a record of the variable state to the data assembled within the assembly shift register.
Claim 4
Dependent Claim
28 words
A variable monitoring system in accordance with claim 1 wherein the event logic generates a scan inhibit signal that stops the scan until after data has been assembled.
Claim 5
Dependent Claim
52 words
A variable monitoring system in accordance with claim 3 wherein the scan inhibit signal is generated by an event flip-flop, said event flip-flop being set by an event pulse generated by the event logic means, and said event flip-flop being cleared by the assembly register control means after data has been assembled.
Claim 6
Dependent Claim
42 words
A variable monitoring system in accordance with claim 1: wherein the shift register memory generates a memory full signal which is fed back to the assembly register control means to stop the data assembly process when the shift register memory is full.
Claim 7
Dependent Claim
40 words
A variable monitoring system in accordance with claim 5 and including a memory full circuit that is enabled by the memory full signal to add a marker bit to data assembled within the assembly shift register at a later time.
Claim 8
Dependent Claim
31 words
A variable monitoring system in accordance with claim 6 and including means for terminating the operation of the memory full circuit after a complete scan during which no data is assembled.
Claim 9
Dependent Claim
86 words
A variable monitoring system in accordance with claim 1 in which the states of the monitored variables are represented by a plurality of variable monitoring switches, and which includes a plurality of interconnecting circuits connecting said condition responsive circuits to said variable monitoring swiTches, each of said interconnecting circuits including closely matched resistive and capacitive elements, and each of said interconnecting circuits establishing a uniform time delay at the input to each condition responsive circuit to equalize the response times of all the condition responsive circuits.
Claim 10
Dependent Claim
25 words
A variable monitoring system in accordance with claim 8 wherein one of the matched capacitive elements includes the input capacity of an active amplifying device.
Claim 11
Dependent Claim
17 words
A variable monitoring system in accordance with claim 9 wherein the active amplifying device is a transistor.
Claim 12
Dependent Claim
150 words
A variable monitoring system comprising: a plurality of condition responsive circuit means for monitoring a plurality of variables; scanning means for periodically and serially scanning the condition responsive means; data collection and storage means for collecting and for storing data relating to the monitored variables; output means for generating an output signal bearing data retrieved from said data collection and storage means; summary mode logic means for causing said data collection and storage means to collect and store data whenever said scanning means scans an annunciator means associated with a variable that is in the alarm state; said data collection and storage means including means for temporarily disabling said summary mode logic means each time data is collected and stored; and said output means including means for generating a find next summary signal to re-enable said summary mode logic means when said output means ceases to generate an output signal.
Claim 13
Dependent Claim
150 words
A variable monitoring system comprising: a plurality of condition responsive circuit means for monitoring a plurality of variables; scanning means for periodically and serially scanning the condition responsive means; data collection and storage means for collecting and for storing data relating to the monitored variables; output means for generating an output signal bearing data retrieved from said data collection and storage means; summary mode logic means for causing said data collection and storage means to collect and store data whenever said scanning means scans an annunciator means associated with a variable that is in the alarm state; said data collection and storage means including means for temporarily disabling said summary mode logic means each time data is collected and stored; and said output means including means for generating a find next summary signal to re-enable said summary mode logic means when said output means ceases to generate an output signal.
Claim 14
Dependent Claim
94 words
A variable monitoring system in accordance with claim 11 and further including: a buffer into which a variable number supplied by the scanning means is stored whenever the summary mode logic means is temporarily disabled; comparator means for comparing the variable number stored in said buffer with the variable number presented by the scanning means, and for generating a successful comparison signal when the two numbers are the same; and re-enable delay means for preventing the find next summary signal from re-enabling the summary mode logic means until the successful comparison signal is generated.
Claim 15
Dependent Claim
42 words
A variable monitoring system in accordance with claim 11 wherein the summary mode control means is automatically disabled whenever the scanning means encounters an condition responsive circuit means associated with a variable that has changed its state since the last previous scan.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-11 | 1976-01-10 | 1976-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-11 | 1980-01-10 | 1980-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-11 | 1984-01-10 | 1984-07-11 | $7700.00 | Window Closed / Lapsed |