US3676862A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Signal conversion system with time base compression of the input data
Assignee: Panasonic Holdings Corp
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Filing: 1971-06-30
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Granted: 1972-07-11
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Expires: 1991-06-30
Abstract
Abstract A signal conversion system in which coded signal pulses to be transmitted to a remote place, for example, pulses of coded facsimile signal, are stored in at least one shift register in synchronization with clock pulses and said signal pulses stored in the shift register are let out by quickening the shift cycle of the shift register when a predetermined number of said signal pulses have been entered in the shift register, thereby providing compressed and discrete sequences of signal pulses which can be put in, for example, the horizontal or the vertical flyback interval of a television signal to be transmitted through the latter''s transmission channel.
Inventors
- 👤 Kaoru Sasabe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 19:22
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/00095; H04N7/00; H04N7/08; H04N7/084; H04N7/085; H04N7/0855; H04N7/087; H04N7/088; H04N7/0881
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
184 words
A signal conversion device, comprising: generating means for generating an analogue signal; converting means for converting said analogue signal into a digital signal having a plurality of digits; shift register means for storing and shifting a predetermined number of digits comprising said digital signal; low frequency generating means for generating a series of pulses of a first frequency; high frequency generating means for generating a series of pulses of a second frequency which is higher than said first frequency; switching means for selectively connecting the outputs of said low frequency generating means and said high frequency generating means to said shift register means to control the shift speed of said shift register means; frequency divider means connected between the output of said low frequency generating means and said switching means for dividing the frequency of the output of said low frequency generating means and controlling the switching operation of said switching means; and means connecting the output of said low frequency generating means to said converting means to control the rate at which said converting means converts said analogue signal into said digital signal.
Claim 2
Dependent Claim
184 words
A signal conversion device, comprising: generating means for generating an analogue signal; converting means for converting said analogue signal into a digital signal having a plurality of digits; shift register means for storing and shifting a predetermined number of digits comprising said digital signal; low frequency generating means for generating a series of pulses of a first frequency; high frequency generating means for generating a series of pulses of a second frequency which is higher than said first frequency; switching means for selectively connecting the outputs of said low frequency generating means and said high frequency generating means to said shift register means to control the shift speed of said shift register means; frequency divider means connected between the output of said low frequency generating means and said switching means for dividing the frequency of the output of said low frequency generating means and controlling the switching operation of said switching means; and means connecting the output of said low frequency generating means to said converting means to control the rate at which said converting means converts said analogue signal into said digital signal.
Claim 3
Dependent Claim
88 words
A signal conversion device as defined in claim 1, wherein: said shift register means comprises a plurality of shift register means; and said converting means comprises quantizer means for sampling said analogue signal in synchronIsm with said first frequency and separating the sampled signal into a plurality of discrete parts according to the amplitude of each sampled signal and logic gate means connected to the output of said quantizer means for applying each of said discrete parts to a corresponding one of said plurality of shift register means.
Claim 4
Dependent Claim
50 words
A signal conversion means as defined in claim 2, further comprising: pulse converting means connected to the output of said plurality of shift register means for producing an analogue signal having a single sequence of pulses composed of the successive outputs of each of said plurality of shift register means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-11 | 1976-01-10 | 1976-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-11 | 1980-01-10 | 1980-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-11 | 1984-01-10 | 1984-07-11 | $7700.00 | Window Closed / Lapsed |