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US3676861A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiple mask registers for servicing interrupts in a multiprocessor system

Assignee: Bull HN Information Systems Italia SpA
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Filing: 1970-12-30
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Granted: 1972-07-11
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Expires: 1990-12-30
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Abstract

Abstract Multiple mask registers located in a system communication controller enable each processor in a multiprocessing system to be a control processor and thereby select and execute interrupts on a priority basis. An executive program which supervises a processor loads its mask register with information according to the priority of the operation to be performed by the processor to control the answering of communication from itself and other modules of the processing system. The system controller includes an interrupt cells register associated with all of the mask registers. The interrupt cells store the existence of an interrupt request and are arranged in a predetermined priority which is altered by each mask register for each control processor.

Inventors

  • 👤 Richard Leroy Ruth

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 11:24
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/46; G06F9/48; G06F9/4806; G06F9/4812; G06F13/00; G06F13/14; G06F13/20; G06F13/24; G06F13/26

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 242 words
A data processing system comprising: a memory store for storing data and program instructions at addressable locations; a plurality of communicating devices including a plurality of data processors and control data processors for manipulating data in accordance with the program instructions retrieved from said memory store, said communicating devices including means for generating interrupt signals in response to predetermined conditions, said control data processors each including means for generating mask signals identifying the priority of the program instructions being used by the control data processor to manipulate data, and each including means for interrupting the manipulations; and a system controller connected to said memory store and to said communicating devices responsive to the generation of said interrupt signals for providing an address to said control data processor, said address including a bit configuration unique to the conditions giving rise to the generation of the interrupt signals, said system controller also responsive to the generation of said interrupt signals for providing an interrupt present signal to interrupt the manipulations of said control data processor, said system controller including a plurality of means responsive to said mask signals one means associated with each control data processor for inhibiting the generation of said interrupt present signal and the presentation of said address to its associated control data processor according to the priority of the program instruction in the mask signal when said interrupt signals are generated in response to selected ones of said predetermined conditions.
Claim 2
Dependent Claim 242 words
A data processing system comprising: a memory store for storing data and program instructions at addressable locations; a plurality of communicating devices including a plurality of data processors and control data processors for manipulating data in accordance with the program instructions retrieved from said memory store, said communicating devices including means for generating interrupt signals in response to predetermined conditions, said control data processors each including means for generating mask signals identifying the priority of the program instructions being used by the control data processor to manipulate data, and each including means for interrupting the manipulations; and a system controller connected to said memory store and to said communicating devices responsive to the generation of said interrupt signals for providing an address to said control data processor, said address including a bit configuration unique to the conditions giving rise to the generation of the interrupt signals, said system controller also responsive to the generation of said interrupt signals for providing an interrupt present signal to interrupt the manipulations of said control data processor, said system controller including a plurality of means responsive to said mask signals one means associated with each control data processor for inhibiting the generation of said interrupt present signal and the presentation of said address to its associated control data processor according to the priority of the program instruction in the mask signal when said interrupt signals are generated in response to selected ones of said predetermined conditions.
Claim 3
Dependent Claim 91 words
The data processing system of claim 1 wherein the system controller includes: a plurality of storage means one associated with each control data processor for storing said interrupt signals when said interrupt signals are generated in response to selected ones of said predetermined conditions and transmitted to said system controller; a plurality of mask registers one associated with each storage means for storing said mask signals according to the priority of the program instructions when said mask signals are generated by said control data processor and transmitted to said system controller.
Claim 4
Dependent Claim 72 words
The data processing system of claim 2 wherein the system controller also includes a plurality of priority trees each controlled by an associated one of said plurality of mask registers and each connected to an associated one of said plurality of storage means for generating said interrupt present signals to an associated one of said plurality of control data processors according to the priority of the program instruction in the mask signal.
Claim 5
Dependent Claim 45 words
The data processing system of claim 3 wherein said interrupt signals comprise a priority rating signal set identifying the priority of the interrupt signal stored in said storage means and an identification signal signifying an addressable location of a program instruction in said memory store.
Claim 6
Dependent Claim 230 words
A data processing system comprising: a memory store for storing data and program instructions at addressable locations; a plurality of communicating modules including a plurality of data processors and control data processors for manipulating data in accordance with the program instructions, each of said communicating modules including means for generating interrupt signals in response to predetermined conditions, said control data processors each including means for generating mask signals identifying the priority of the program instructions being used by the control data processor to manipulate data and each including means for interrupting the manipulations; and a system controller connected to said memory store and to said plurality of modules responsive to the generation of said interrupt signals for providing an interrupt present signal to said plurality of control data processors; said system controller including, a plurality of storage means one associated with each control data processor for storing said interrupt signals when said interrupt signals are generated in response to selected ones of said predetermined conditions and transmitted to said system controller, a plurality of mask registers one associated with each storage means for storing said mask signals according to the priority of the program instruction when said mask signals are generated by said control data processor and transmitted to said system controller; and means controlled by said plurality of mask registers for inhibiting the generation of said interrupt present signal.
Claim 7
Dependent Claim 230 words
A data processing system comprising: a memory store for storing data and program instructions at addressable locations; a plurality of communicating modules including a plurality of data processors and control data processors for manipulating data in accordance with the program instructions, each of said communicating modules including means for generating interrupt signals in response to predetermined conditions, said control data processors each including means for generating mask signals identifying the priority of the program instructions being used by the control data processor to manipulate data and each including means for interrupting the manipulations; and a system controller connected to said memory store and to said plurality of modules responsive to the generation of said interrupt signals for providing an interrupt present signal to said plurality of control data processors; said system controller including, a plurality of storage means one associated with each control data processor for storing said interrupt signals when said interrupt signals are generated in response to selected ones of said predetermined conditions and transmitted to said system controller, a plurality of mask registers one associated with each storage means for storing said mask signals according to the priority of the program instruction when said mask signals are generated by said control data processor and transmitted to said system controller; and means controlled by said plurality of mask registers for inhibiting the generation of said interrupt present signal.
Claim 8
Dependent Claim 64 words
The data processing system of claim 5 wherein the system controller also includes a plurality of priority trees each controlled by an associated one of said plurality of mask registers and each connected to an associated one of said plurality of storage means for generating said interrupt present signals to an associated one of said plurality of control data processors according to a priority.
Claim 9
Dependent Claim 53 words
The data processing system of claim 6 wherein said interrupt signals comprise a priority rating signal set identifying the priority of the interrupt signals for storage in said storage means and an identification signal signifying an addressable location of a program instruction in said memory store for transmission to said control data processor.
Claim 10
Dependent Claim 224 words
In a data processing system including a memory store device for storing data and program instructions at addressable locations, a plurality of communicating devices including a plurality of control data processors for manipulating data in accordance with the program instructions and responding to interrupt signals to interrupt the program instructions, said communicating devices including means for generating the interrupt signals in response to predetermined conditions, a system controller connected to said store device and to said communicating devices responsive to the generation of said interrupt signals for providing an interrupt present signal to said control data processors, the improvement to the system controller comprising: a plurality of storage means one associated with each control data processor for storing said interrupt signals when said interrupt signals are generated in response to selected ones of said predetermined conditions and transmitted to said system controller; a plurality of mask regisTers one associated with each storage means for storing a representation of the priority of the program instruction manipulating data in the associated control data processor; and a plurality of priority trees each controlled by an associated one of said plurality of mask registers and each connected to an associated one of said plurality of storage means for generating said interrupt present signals to an associated one of said plurality of control data processors according to a priority.
Claim 11
Dependent Claim 224 words
In a data processing system including a memory store device for storing data and program instructions at addressable locations, a plurality of communicating devices including a plurality of control data processors for manipulating data in accordance with the program instructions and responding to interrupt signals to interrupt the program instructions, said communicating devices including means for generating the interrupt signals in response to predetermined conditions, a system controller connected to said store device and to said communicating devices responsive to the generation of said interrupt signals for providing an interrupt present signal to said control data processors, the improvement to the system controller comprising: a plurality of storage means one associated with each control data processor for storing said interrupt signals when said interrupt signals are generated in response to selected ones of said predetermined conditions and transmitted to said system controller; a plurality of mask regisTers one associated with each storage means for storing a representation of the priority of the program instruction manipulating data in the associated control data processor; and a plurality of priority trees each controlled by an associated one of said plurality of mask registers and each connected to an associated one of said plurality of storage means for generating said interrupt present signals to an associated one of said plurality of control data processors according to a priority.
Claim 12
Dependent Claim 30 words
The data processing system of claim 8 wherein said interrupt signals comprise a priority rating signal set identifying the priority of the interrupt signals for storage in said storage means.
Claim 13
Dependent Claim 58 words
The data processing system of claim 9 wherein said interrupt signals also comprise an identification signal and wherein said system controller also comprises an address generating means actuated according to the identification signal to generate an address location of a program instruction in said memory store for transmission to said control data processor with said interrupt present signal.

References Cited (Backward Citations)

US3374465A Cited
US3479649A Cited
US3421150A Cited
US3500329A Cited
US3540000A Cited
US3523283A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1975-07-11 1976-01-10 1976-07-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1979-07-11 1980-01-10 1980-07-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1983-07-11 1984-01-10 1984-07-11 $7700.00 Window Closed / Lapsed

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