US3676656A
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US
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Electronic digital slide rule
Assignee: General Electric Co
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Filing: 1969-06-30
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Granted: 1972-07-11
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Expires: 1989-06-30
Abstract
Abstract An electronic digital slide rule in the form of a small handcarried, battery powered digital electronic calculator capable of performing substantially all of the mathematical operations performed by the conventional mechanical slide rule. The electronic digital slide rule utilizes a computing technique based on integrating for a period of time proportional to one input variable x, a fixed or variable pulse rate signal, the magnitude of which may be proportional to another input variable y, to a constant, or to some other known function. The computing technique is implemented by a pulse rate generator producing a pulsetrain representative of one factor of a function whose solution is desired. First factor input means are provided for supplying the one factor to the input of the pulse rate generation means whose output is supplied to an output integrator and timing circuit. A second factor input means is coupled to and controls at least in part operation of the output integrator and timing circuit means. The electronic digital slide rule is completed by a function selector switching means that interconnects the pulse rate generation means to the second factor input means and to the output integrator and timing circuit means in a manner to perform a selected one of a plurality of different logical operations on the first and second input factors to thereby derive a desired output solution. In preferred embodiments of the slide rule, an output indicating means is coupled to the output from the output integrator and timing circuit means for displaying the solution in legible form. The plurality of different logical operations capable of being performed by the electronic digital slide rule include the arithmetic operations of addition, subtraction, multiplication, division, squaring and square rooting, and exponential, logarithmic and trigonometric operations. In constructing the electronic digital slide rule, the first and second factor input means may comprise mechanical switches having a plurality of discrete contact positions which also serve as in input memory for retaining the value of the input first and/or second factors. It is also preferred that the electronic digital slide rule operate from a battery operated power supply means for supplying energizing power to the slide rule through a start-stop switch which energizes the slide rule only during periods of use and conserves the battery power supply during periods of non-use. It is also anticipated that the electronic digital slide rule would be fabricated from micro-miniaturized integrated circuit structures mounted on a single supporting circuit board and housed in the form of a pocket size container for easy transport and use. A preferred embodiment of the electronic digital slide rule also includes a decimal point placement indicating means for visibly indicating to the user of the device the position of the decimal point in an output solution displayed by the output indicating means.
Inventors
- 👤 Herman Schmidt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:03
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/60; G06F7/68; G06F15/00; G06F15/02
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
202 words
An electronic digital slide rule comprising pulse rate generating circuitry for producing an information bearing pulse train whose repetition rate is representative of an input factor, said pulse rate generating circuitry including first factor input means, a master counter responsive to a reference pulse rate and at least one digitally operable multiplier and counter arrangement, said arrangement including a first input counter responsive to said first factor input means and multiplier gates controlled by said first input counter and said master counter, said arrangement producing said information bearing pulsetrain from said gates; output integrator and timing circuit means including second factor input means, a digitally operable second input counter responsive to said second factor input means coupled to and controlling, at least in part, operation of said integrator and timing circuit means, and a digitally operable output counter; and, function selector switching means interchangeably interconnecting said pulse rate generating circuitry, said second input counter and said output counter in any one of a plurality of more than two combinations as required to perform any selected one of a plurality of different arithmetic operations using factors introduced through said factor input means to produce a solution as a count on said output counter.
Claim 2
Dependent Claim
202 words
An electronic digital slide rule comprising pulse rate generating circuitry for producing an information bearing pulse train whose repetition rate is representative of an input factor, said pulse rate generating circuitry including first factor input means, a master counter responsive to a reference pulse rate and at least one digitally operable multiplier and counter arrangement, said arrangement including a first input counter responsive to said first factor input means and multiplier gates controlled by said first input counter and said master counter, said arrangement producing said information bearing pulsetrain from said gates; output integrator and timing circuit means including second factor input means, a digitally operable second input counter responsive to said second factor input means coupled to and controlling, at least in part, operation of said integrator and timing circuit means, and a digitally operable output counter; and, function selector switching means interchangeably interconnecting said pulse rate generating circuitry, said second input counter and said output counter in any one of a plurality of more than two combinations as required to perform any selected one of a plurality of different arithmetic operations using factors introduced through said factor input means to produce a solution as a count on said output counter.
Claim 3
Dependent Claim
105 words
An electronic digital slide rule according to claim 1 wherein the function selector switching means connects said reference pulse rate to the input of the second input counter and connects said information bearing pulsetrain from the multiplier gates of the pulse rate generating circuitry to the input of the output counter for a period of time required to count the contents of the second input counter down to zero whereby the solution appearing in the count registered in the output counter represents the product of a factor applied to said first factor input means multiplied by a factor applied to said second factor input means.
Claim 4
Dependent Claim
120 words
A digital electronic slide rule according to claim 1 wherein said function selector switching means connects said reference rate to the input of the output counter and connects said information bearing pulsetrain from the multiplier gates of the pulse rate generating circuitry to the input of the second input counter for counting down the second input counter with said pulsetrain while supplying said reference pulse rate to the input of the output counter for a period of time required to count down the second input counter to zero value whereby the counT registered in the output counter represents the quotient obtained by dividing a factor supplied to the second input counter by a factor supplied to the first input counter.
Claim 5
Dependent Claim
100 words
An electronic digital slide rule according to claim 1 wherein said function selector switching means is sequentially operated to connect said reference pulse rate to the input of the output counter for a period of time required to count down the contents of the second input counter for two successive count values applied to the second input counter and wherein the two successive values represent values to be added or subtracted with the second count being added to or subtracted from the first count registered in the output counter dependent upon whether an addition or subtraction operation is carried out.
Claim 6
Dependent Claim
146 words
A digital electronic slide rule according to claim 1 wherein said function selector switching means connects said reference pulse rate to the input of both the first and second input counters with the first input counter being initially set to zero and with the second input counter being initially set to a value to be squared and connects said information bearing pulsetrain from the multiplier gates to the input of the output counter for a period of time required to count down the contents of the second input counter to zero whereby the contents of the first input counter is increased linearly with time to thereby increase the pulse rate of said information bearing pulsetrain to the output counter proportionately and produce a count in the output counter which is proportional to the square of the value to which the second input counter was initially set.
Claim 7
Dependent Claim
151 words
A digital electronic slide rule according to claim 1 wherein said function selector switching means connects said reference pulse rate to the input of the first input counter and to the input of the output counter with the first input counter being initially set to zero and the second input counter being initially set to the value whose square root is sought, the reference pulse rate being thus connected for a period of time required to count down the contents of the second input counter with said information bearing pulsetrain whose repetition rate increases linearly with time, said function selector switching means further connecting the information bearing pulsetrain to the input of the second input counter to count down the contents of the second input counter whereby the count accumulated in the output counter represents a value proportional to the square root of the count registered in the second input counter.
Claim 8
Dependent Claim
127 words
A digital electronic slide rule according to claim 1 wherein said function selector switching means connects said reference pulse rate to the input of the second input counter having a value stored therein representative of the exponent in the expression Z ex, and further connects the information bearing pulsetrain back to the input of the first input counter which is initially set to the value 1 and also connects the information bearing pulsetrain to the input of the output counter, which is also set to the decimal number 1, for a period of time required to count the contents of the second input counter down to zero value whereby the count accumulated in the output counter is representative of the value Z in the expression Z ex.
Claim 9
Dependent Claim
132 words
A digital electronic slide rule according to claim 1 wherein said function selector switching means connects the information bearing pulsetrain back to the inputs of both the first input counter and the second input counter while starting with the decimal number 1 stored in the first input counter and in the output counter and a value x whose natural logarithm is to be determined initially placed in the second input counter, said function selector switching means also connecting said reference pulse rate to the input of the output counter for a period of time required to count the contents of the second input counter Down to zero whereby the count registered in the output counter will be proportional to the natural logarithm of the value x placed in the second input counter.
Claim 10
Dependent Claim
186 words
A digital electronic slide rule according to claim 1 wherein said pulse rate generating circuitry includes an additional multiplier and counter arrangement comprising a third input counter and a second set of multiplier gates interconnected with said master counter for producing another information bearing pulsetrain, said function selector switching means connects said reference pulse rate to the input of the second input counter which is initially set to a value whose sine function is desired, connects the information bearing pulsetrain from the first set of multiplier gates to the input of the third input counter which is initially set to zero, and connects the information bearing pulsetrain from the second multiplier gates to the input of the first input counter which is initially set to the decimal value 9999 and to the input of the output counter which is initially set to zero for a period of time required to count down the contents of the second input counter to zero value whereby the count accumulated in the output counter will be proportional to the sine of the value initially set in the second input counter.
Claim 11
Dependent Claim
186 words
An electronic digital slide rule according to claim 1 wherein said pulse rate generating circuitry includes an additional multiplier and counter arrangement comprising a third input counter and a second set of multiplier gates interconnected with said master counter for producing another information bearing pulsetrain, said function selector switching means connects said reference pulse rate to the input of the second input counter which is initially set to the value whose cosine is desired, connects the information bearing pulsetrain from the second multiplier gates to the input of the first input counter which has the value 9999 initially placed therein and connects the information bearing pulsetrain from the first multiplier gates to the input of the third input counter which has the value of zero initially placed therein and to the input of the output counter which has the value 9999 initially placed therein for a period of time required to count down the contents of the second input counter to zero value whereby the count accumulated in the output counter will be proportional to the cosine of the value registered in the second input counter.
Claim 12
Dependent Claim
44 words
An electronic digital slide rule according to claim 1 wherein said first and second factor input means include manually operable mechanical switches having a plurality of discrete contact positions which also serve as input memory devices for retaining the value of the input factors.
Claim 13
Dependent Claim
71 words
A digital electronic slide rule according to claim 1 wherein said multiplier gates employed in the slide rule constitute decimal rate multipliers utilizing binary coded decimal counters, and said output counter includes binary coded decimal to code seven converters and electronic seven bar numeric output indicating means for conversion of the binary coded decimal count to suitable form for displaying the output solution as a legible set of decimal numeral characters.
Claim 14
Dependent Claim
49 words
An electronic digital slide rule according to claim 12 further including decimal point indicating means operatively coupled to and controlled by the first factor input means and second factor input means for indicating the placement of the decimal point in the output solution displayed by said output indicating means.
Claim 15
Dependent Claim
105 words
In an electronic computing device of the class having a rate multiplier and a first counter for producing a pulse rate signal proportional both to a clock rate and to a parallel digital input signal representing a first quantity and having a second counter responsive to said pulse rate signal and to a signal representing a second quantity for producing a digital count representative of the product or quotient of said two quantities, The combination of at least one additional counter and switching means for selectively connecting said multiplier and first counter to perform any of a plurality of arithmetic computational operations including transcendental functions.
Claim 16
Dependent Claim
105 words
In an electronic computing device of the class having a rate multiplier and a first counter for producing a pulse rate signal proportional both to a clock rate and to a parallel digital input signal representing a first quantity and having a second counter responsive to said pulse rate signal and to a signal representing a second quantity for producing a digital count representative of the product or quotient of said two quantities, The combination of at least one additional counter and switching means for selectively connecting said multiplier and first counter to perform any of a plurality of arithmetic computational operations including transcendental functions.
Claim 17
Dependent Claim
30 words
The computing device of claim 14 wherein one said additional counter provides said parallel digital input signal representing a first quantity to said rate multiplier as a function of time.
Claim 18
Dependent Claim
114 words
In an electronic computing device of the class having a first rate multiplier and a first counter for producing a pulse rate signal proportional both to a clock rate and to a parallel digital input signal representing a first quantity and having a second counter responsive to said pulse rate signal and to a signal representing a second quantity for producing a digital count representative of the product or quotient of said two quantities, the combination of at least one additional rate multiplier, at least one additional counter and switching means for selectively connecting said rate multipliers and said additional counter to perform any of a plurality of arithmetic computational operations including transcendental functions.
Claim 19
Dependent Claim
114 words
In an electronic computing device of the class having a first rate multiplier and a first counter for producing a pulse rate signal proportional both to a clock rate and to a parallel digital input signal representing a first quantity and having a second counter responsive to said pulse rate signal and to a signal representing a second quantity for producing a digital count representative of the product or quotient of said two quantities, the combination of at least one additional rate multiplier, at least one additional counter and switching means for selectively connecting said rate multipliers and said additional counter to perform any of a plurality of arithmetic computational operations including transcendental functions.
Claim 20
Dependent Claim
31 words
The computing device of claim 16 wherein one said additional counter provides said parallel digital input signal representing a first quantity to said first rate multiplier as a function of time.
Claim 21
Dependent Claim
44 words
The computing device of claim 17 wherein there is one said additional rate multiplier and a second additional counter associated with said additional rate multiplier whereby a second parallel digital input signal representing a third quantity can be supplied as a function of time.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-07-11 | 1976-01-10 | 1976-07-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-07-11 | 1980-01-10 | 1980-07-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-07-11 | 1984-01-10 | 1984-07-11 | $7700.00 | Window Closed / Lapsed |