Digitalized filter

Claim 3

Apparatus for recovering a given size word comprising a portion of a larger word comprising, in combination: first means for presenting a word consisting of M bits in serial bit format commencing at time T; second means for commencing serial read-in of a word of M-N bits at time T+D and continuing for M-N bits where N and D are positive and M-N equals the given size word; and selected delay means connected between said first and second means for delaying the time of presentation of the word to said second means between T and T+D wherein the delay is selected in accordance with the portion desired of the larger word obtained from said first means.

Claim 4

Apparatus for recovering a given size word comprising a portion of a larger word comprising, in combination: first means for presenting a word consisting of M bits in serial bit format commencing at time T; second means for commencing serial read-in of a word of M-N bits at time T+D and continuing for M-N bits where N and D are positive and M-N equals the given size word; and selected delay means connected between said first and second means for delaying the time of presentation of the word to said second means between T and T+D wherein the delay is selected in accordance with the portion desired of the larger word obtained from said first means.

Claim 5

Recursive digital filter apparatus for digitally filtering a signal wherein said filter comprises at least one storage means for temporarily storing the product of feedback signal operations, the improvement comprising, in combination: monitoring means for controlling apparatus oscillations connected to said storage means and adapted to provide an output when the word being monitored exceeds a predetermined magnitude.

Claim 6

Recursive digital filter apparatus for digitally filtering a signal wherein said filter comprises at least one storage means for temporarily storing the product of feedback signal operations, the improvement comprising, in combination: monitoring means for controlling apparatus oscillations connected to said storage means and adapted to provide an output when the word being monitored exceeds a predetermined magnitude.

Claim 7

Apparatus as claiMed in claim 3 wherein the monitoring means compares the sign bit and one of the magnitude bits in the storage means.

Claim 8

Recursive digital filtering apparatus of the type which may oscillate upon repeated overflow of digital storage registers comprising in combination: first input means for supplying a digital input signal to be filtered; first storage means for storing signals supplied thereto and providing an output indicative of the stored signal; second input means for supplying an input multiplier signal; multiplier means connected to said first and second input means and to said storage means for multiplying the output signal received from said storage means by the signal received from said second input means and for adding the signal received from said first input means to the product of the multiplication process before supplying the digital result signal in serial bit stream format to said storage means to be stored; and monitoring means for providing an output for preventing oscillations of the filtering apparatus when the digital results signal supplied to said storage means exceeds a predetermined magnitude.

Claim 9

Recursive digital filtering apparatus of the type which may oscillate upon repeated overflow of digital storage registers comprising in combination: first input means for supplying a digital input signal to be filtered; first storage means for storing signals supplied thereto and providing an output indicative of the stored signal; second input means for supplying an input multiplier signal; multiplier means connected to said first and second input means and to said storage means for multiplying the output signal received from said storage means by the signal received from said second input means and for adding the signal received from said first input means to the product of the multiplication process before supplying the digital result signal in serial bit stream format to said storage means to be stored; and monitoring means for providing an output for preventing oscillations of the filtering apparatus when the digital results signal supplied to said storage means exceeds a predetermined magnitude.

Claim 10

Recursive digital filtering apparatus comprising in combination: first input means for supplying a digital input signal to be filtered; first storage means for storing signals supplied thereto and providing an output indicative of the stored signals; second input means for supplying an input multiplier signal; multiplier means connected to said first and second input means and to said storage means for multiplying the output signal received from said storage means by the signal received from said second input means and for adding the signal received from said first input means to the product of the multiplication process before supplying the result signal in serial bit stream format to said storage means to be stored; and reset means for preventing oscillations of the filtering apparatus by resetting the word in said storage means to a lesser number when the number supplied thereto exceeds a predetermined magnitude.

Claim 11

Recursive digital filtering apparatus comprising in combination: first input means for supplying a digital input signal to be filtered; first storage means for storing signals supplied thereto and providing an output indicative of the stored signals; second input means for supplying an input multiplier signal; multiplier means connected to said first and second input means and to said storage means for multiplying the output signal received from said storage means by the signal received from said second input means and for adding the signal received from said first input means to the product of the multiplication process before supplying the result signal in serial bit stream format to said storage means to be stored; and reset means for preventing oscillations of the filtering apparatus by resetting the word in said storage means to a lesser number when the number supplied thereto exceeds a predetermined magnitude.

Claim 12

Apparatus as claimed in claim 6 wherein said reset means comprises comparison means for checking the sign bit with one of the magnitude bits to determine when the predetermined magnitude is exceeded.

Claim 13

Apparatus as claimed in claim 7 wherein the comparison means comprises an exclusive OR gate and said reset means also includes means for providing an output indicating when a reset has occurred.

Claim 14

Apparatus as claimed in claim 6 wherein said multiplier means includes at least two multiplying units and summing means for adding the products of said multiplying units before supplying the sum to said storage means and wherein said storage means provides two different words simultaneously to said two multiplying units.

Claim 15

Apparatus claimed in claim 6 comprising in addition: second storage means for reading-in a word, of a serial bit length which is less than the result signal supplied to said first storage means commencing at a given time subsequent to the initial generation of said result signal; and means for delaying the transmission of signals therethrough in accordance with a control input connected to supply said result signal to said second storage means to provide controlled truncation of said result signal.

Claim 16

A filter for sampled signals expressed in digital form comprising storage, multiplication and summing means and constructed to directly implement the following equation: Y(n) g(X(n)-CX(n 1)) + AY(n 1)-BY(n 2) Where X(n) The sampled input signal, one sample value each sampling clock Y(n) The sampled output signal, one value or computation per each input sample Y(n i) The sampled output delayed by i samples X(n i) The sampled input delayed By i samples A Fixed time invariant coefficient that determines the resonant frequency, (-2.0 < A < +2.0) B Fixed time invariant coefficient that determines the bandwidth or Q of the filter (0<B<1.0) -1 < C <l

Claim 17

A filter for sampled signals expressed in digital form comprising storage, multiplication and summing means and constructed to directly implement the following equation: Y(n) g(X(n)-CX(n 1)) + AY(n 1)-BY(n 2) Where X(n) The sampled input signal, one sample value each sampling clock Y(n) The sampled output signal, one value or computation per each input sample Y(n i) The sampled output delayed by i samples X(n i) The sampled input delayed By i samples A Fixed time invariant coefficient that determines the resonant frequency, (-2.0 < A < +2.0) B Fixed time invariant coefficient that determines the bandwidth or Q of the filter (0<B<1.0) -1 < C <l

Claim 18

A digital filter for sampled signals expressed in digital word format and including a filter output comprising: means for receiving the sampled signals; first register means for storing signals appearing at the output of said digital filter delayed by one word; second register means for storing signals appearing at the output of said digital filter delayed by two words; first means for multiplying the contents of said first register means by a first constant; second means for multiplying the contents of said register by a second constant, said first constant being between -2 and +2, said second constant being between 0 and 1, said first constant also being less than 1 + the value of said second constant; and summing means for summing each sampled input signal and the outputs of said first and second multiplication means and supplying the summation to the filter output.

Claim 19

A digital filter for sampled signals expressed in digital word format and including a filter output comprising: means for receiving the sampled signals; first register means for storing signals appearing at the output of said digital filter delayed by one word; second register means for storing signals appearing at the output of said digital filter delayed by two words; first means for multiplying the contents of said first register means by a first constant; second means for multiplying the contents of said register by a second constant, said first constant being between -2 and +2, said second constant being between 0 and 1, said first constant also being less than 1 + the value of said second constant; and summing means for summing each sampled input signal and the outputs of said first and second multiplication means and supplying the summation to the filter output.

Claim 20

A digital filter as defined by claim 12 wherein at least one of said first and second register means includes means for resetting upon the contents of said one register exceeding half-scale of said register.