US3673431A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low voltage pulser circuit for driving row-column conductor arrays of a gas discharge display capable of being made in integrated circuit form
Assignee: OI Glass Inc
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Filing: 1971-05-28
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Granted: 1972-06-27
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Expires: 1991-05-28
Abstract
Abstract There is disclosed an interfacing system for driving row-column conductor arrays to the gas discharge display panel in a low cost integrated circuit assembly. Due to the requirement of opposite polarity or bidirectional signals being applied to the conductors in the arrays, although the integrated circuits are functionally identical in translating low level logic signals to high voltage pulse signals which are algebraically added to sustainer voltages, the circuits are modified so as to permit NPN PNP transistors to be formed on the same chip and thus simulate a power PNP transistor.
Inventors
- 👤 Thomas Edward O'brien
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 19:38
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/28; G09G3/288; G09G3/296; G09G3/297; H; H03; H03K; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
238 words
An integrated circuit system for supplying sustaining voltages and discharge manipulating pulse voltages to one group of row conductors and one group of column conductors in a gas discharge device in which transversely oriented row and column conductors effecting discharges in the gas have dielectric charge-storage means, for charges produced on discharge, interposed between said row and column conductors and the gas, comprising in combination, at least a pair of monolithic semiconductor bodies, each processed to include a plurality of individual transistor switching circuits connected by conductors in circuit configurations described, hereinafter including a plurality of contact areas to which connections to and from said circuit configurations are made, each said circuit configuration being functionally identical, wherein: each circuit configuration translates a low level input pUlse signal voltage to a high level pulse signal voltage and feeding through a high level periodic signal voltage as said sustaining voltage, the output voltages from each circuit configuration being of opposite polarity, respectively, the improvements wherein: each said circuit configuration on one of said bodies including as means for translating low level pulse signal voltage to a high level pulse signal voltage a pair of complementary configured transistors formed in NPN PNP fashion to simulate a power PNP transistor, and each said circuit configuration on the other of said bodies including as means for translating low level pulse signal voltages to a high level pulse signal voltage a power NPN transistor.
Claim 2
Dependent Claim
238 words
An integrated circuit system for supplying sustaining voltages and discharge manipulating pulse voltages to one group of row conductors and one group of column conductors in a gas discharge device in which transversely oriented row and column conductors effecting discharges in the gas have dielectric charge-storage means, for charges produced on discharge, interposed between said row and column conductors and the gas, comprising in combination, at least a pair of monolithic semiconductor bodies, each processed to include a plurality of individual transistor switching circuits connected by conductors in circuit configurations described, hereinafter including a plurality of contact areas to which connections to and from said circuit configurations are made, each said circuit configuration being functionally identical, wherein: each circuit configuration translates a low level input pUlse signal voltage to a high level pulse signal voltage and feeding through a high level periodic signal voltage as said sustaining voltage, the output voltages from each circuit configuration being of opposite polarity, respectively, the improvements wherein: each said circuit configuration on one of said bodies including as means for translating low level pulse signal voltage to a high level pulse signal voltage a pair of complementary configured transistors formed in NPN PNP fashion to simulate a power PNP transistor, and each said circuit configuration on the other of said bodies including as means for translating low level pulse signal voltages to a high level pulse signal voltage a power NPN transistor.
Claim 3
Dependent Claim
58 words
The invention defined in claim 1 wherein a plurality of the circuit configurations on a body are controlled by a common enabling pulse voltage, the further improvements wherein, with respect to the said circuits on said one of said bodies, said enabling pulse voltage is applied to said circuits through a differential current splitter circuit on said body.
Claim 4
Dependent Claim
54 words
The invention defined in claim 2 wherein the said current splitter circuit is constituted by a first transistor element and a plurality of second transistor elements, said plurality of second transistor elements being unique to each said circuit configuration and said first transistor circuit element being common to all said plurality of circuit configurations.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-27 | 1975-12-27 | 1976-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-27 | 1979-12-27 | 1980-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-27 | 1983-12-27 | 1984-06-27 | $7700.00 | Window Closed / Lapsed |