US3673356A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Loop monitor circuit
Assignee: International Standard Electric Corp
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Filing: 1969-09-05
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Granted: 1972-06-27
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Expires: 1989-09-05
Abstract
Abstract A circuit for determining the resistance of a loop by connecting the loop terminals through like resistances to respective poles of a voltage source. Each terminal is also connected to the opposite pole of the source through a voltage divider, the dividers being symmetrical. An evaluating device is bridged across taps in the voltage dividers, the taps being positioned to produce like resistive ratios in the dividers.
Inventors
- 👤 Eberhard Herter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 11:19
CPC Classifications
H; H04; H04Q; H04Q3/00
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
138 words
A circuit for evaluating the condition of a telephone loop and for differentiating between resistances of said loop, comprising a voltage source, first means connecting each pole of said source to a respective terminal of said loop, said first connecting means including substantially identical resistances in each connection between a pole and a terminal, second connecting means comprising a first and a second voltage divider, each divider being connected between a separate terminal and a pole of said source for poling the respective terminals contrary to the polarity derived through said first connecting means evaluating means, means connecting said evaluating means into each of said voltage dividers at like taps in said dividers, and a twoterminal network connected to said connecting means, at least one of said last mentioned connection being intermediately within one of said voltage dividers.
Claim 2
Dependent Claim
138 words
A circuit for evaluating the condition of a telephone loop and for differentiating between resistances of said loop, comprising a voltage source, first means connecting each pole of said source to a respective terminal of said loop, said first connecting means including substantially identical resistances in each connection between a pole and a terminal, second connecting means comprising a first and a second voltage divider, each divider being connected between a separate terminal and a pole of said source for poling the respective terminals contrary to the polarity derived through said first connecting means evaluating means, means connecting said evaluating means into each of said voltage dividers at like taps in said dividers, and a twoterminal network connected to said connecting means, at least one of said last mentioned connection being intermediately within one of said voltage dividers.
Claim 3
Dependent Claim
46 words
The circuit arrangement of claim 1, characterized in that taps are provided intermediately in each of said voltage dividers, said taps being positioned to dispose a like resistance between each resistance tap and said source in the respective dividers between which said two-terminal network is connected.
Claim 4
Dependent Claim
25 words
The circuit arrangement of claim 1, characterized in that taps are provided each voltage divider and a voltage-limiting resistance is connected between the two taps.
Claim 5
Dependent Claim
83 words
The circuit arrangement of claim 1, characterized in that one voltage divider together with one connecting means is connected via a resistance to one and the same line terminal, the said connecting means being connected with the second terminal of the same connecting means via another resistance, to one pole of the voltage source, said two-terminal network being connected between a tap located intermediately in said voltage divider and a tap at a point having like resistance ratio in the other connecting means.
Claim 6
Dependent Claim
38 words
The circuit arrangement of claim 1, characterized in that a delta circuit is formed by the resistances of one of the voltage dividers, the connecting means being connected in parallel thereto being resistance of an equivalent star circuit.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-27 | 1975-12-27 | 1976-06-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-27 | 1979-12-27 | 1980-06-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-27 | 1983-12-27 | 1984-06-27 | $7700.00 | Window Closed / Lapsed |