Communication system

Claim 2

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having two inputs, two outputs, each said output being connected to a corresponding input at a terminal arranged for connection to said transmission line and bilateral circuitry responsive to an initiating data signal applied via either of said terminals to an input for transmitting a corresponding data signal via an output to the other of said terminals only as long as the initiating data signal continues to be applied at the first terminal, said bilateral circuitry including an inhibiting circuit for preventing transmission of corresponding data signals if initiating data signals are applied at both of said terminals at the same time.

Claim 3

The repeater as claimed in claim 1 wherein said inhibiting circuit includes circuitry responsive to the application of initiating data signals at both of said terminals at the same time for preventing transmission of said corresponding data signals in either direction until no initiating data signal is applied at either of said terminals, so that the duration of a transmitted corresponding data signal is not abridged.

Claim 4

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having two inputs, two outputs, each said output being connected to a corresponding input at a terminal arranged for connection to said transmission line and bilateral circuitry responsive to an initiating data signal applied via either of said terminals to an input for transmitting a corresponding data signal via an output to the other of said terminals only as long as the initiating data signal continues to be applied at the first terminal, said bilateral circuitry including two symmetrical sections, each section including a logic control circuit responsive to signals from both of said inputs, a binary logic transducing component responsive to signals from both of said logic control circuits and signals from its corresponding input, and an inhibiting circuit for preventing transmission of corresponding data signals if initiating data signals are applied at both of said terminals at the same time.

Claim 5

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having two inputs, two outputs, each said output being connected to a corresponding input at a terminal arranged for connection to said transmission line and bilateral circuitry responsive to an initiating data signal applied via either of said terminals to an input for transmitting a corresponding data signal via an output to the other of said terminals only as long as the initiating data signal continues to be applied at the first terminal, said bilateral circuitry including two symmetrical sections, each section including a logic control circuit responsive to signals from both of said inputs, a binary logic transducing component responsive to signals from both of said logic control circuits and signals from its corresponding input, and an inhibiting circuit for preventing transmission of corresponding data signals if initiating data signals are applied at both of said terminals at the same time.

Claim 6

The repeater as claimed in claim 3 wherein each said logic control circuit includes means producing a first logical AND function between one input and the output of the other logic control circuit and a second logical AND function between the other input and its own output.

Claim 7

The repeater as claimed in claim 3 wherein each said transducing component is a digital logic device.

Claim 8

The repeater as claimed in claim 1 wherein said transmission line is a pair of conductors for transmitting binary data between digital data processing devices.

Claim 9

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having two inputs, two outputs, each said output being connected to a corresponding input at a terminal arranged for connection to said transmission line and bilateral circuitry responsive to an initiating data signal applied via either of said terminals to an input for transmitting a corresponding data signal via an output to the other of said terminals only as long as the initiating data signal continues to be applied at the first terminal, said bilateral circuitry including two symmetrical sections, each section including an inverter connected to a corresponding input, a logic control circuit responsive to signals from both of said inverters, a binary logic transducing component responsive to signals from both of said logic control circuits and signals fRom its corresponding inverter, and an inhibiting circuit for preventing transmission of corresponding data signals if initiating data signals are applied at both of said terminals at the same time.

Claim 10

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having two inputs, two outputs, each said output being connected to a corresponding input at a terminal arranged for connection to said transmission line and bilateral circuitry responsive to an initiating data signal applied via either of said terminals to an input for transmitting a corresponding data signal via an output to the other of said terminals only as long as the initiating data signal continues to be applied at the first terminal, said bilateral circuitry including two symmetrical sections, each section including an inverter connected to a corresponding input, a logic control circuit responsive to signals from both of said inverters, a binary logic transducing component responsive to signals from both of said logic control circuits and signals fRom its corresponding inverter, and an inhibiting circuit for preventing transmission of corresponding data signals if initiating data signals are applied at both of said terminals at the same time.

Claim 11

The repeater as claimed in claim 7 wherein said inhibiting circuit includes circuitry responsive to the application of initiating data signals at both of said terminals at the same time for preventing transmission of said corresponding data signals in either direction until no initiating data signal is applied at either of said terminals, so that the duration of a transmitted corresponding data signal is not abridged.

Claim 12

The repeater as claimed in claim 8 wherein said transmission line is a pair of conductors for transmitting binary data between digital data processing devices that include digital driver logic devices connected to said transmission line in logical OR relation with said transducing components.

Claim 13

The repeater as claimed in claim 9 wherein each said transducing component is a digital logic device selected from the class consisting of diode transistor logic (DTL) and transistor transistor logic (TTL) devices.

Claim 14

The repeater as claimed in claim 10 wherein each said logic control circuit includes means producing a first logical AND function between one input and the output of the other logic control circuit and a second logical AND function between the other input and its own output.

Claim 15

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having data inputs A and B, data outputs C and D, data output C being connected to data input B at a first terminal arranged for connection to said transmission line, data output D being connected to data input A at a second terminal arranged for connection to said transmission line, and bilateral circuitry for producing control outputs Y1 and Y2 in response to data initiating signals applied at said first and second terminals as set out in the following state flow diagram (entries indicating next Y1 Y2 conditions): A,B 11 10 01 00 Y1, Y2 00 00 10 01 I 01 00 01 01 01 10 00 10 10 10 11 II III IV V where values I-V are related to one another as follows: I II III IV V 1 00 00 00 00 00 2 00 00 00 00 11 3 00 00 01 10 00 4 00 00 01 10 11 5 00 00 10 01 00 6 00 00 10 01 11 7 00 00 11 11 00 8 00 00 11 11 11 9 00 11 00 00 00 10 00 11 00 00 11 11 00 11 01 10 00 12 00 11 01 10 11 13 00 11 10 01 00 14 00 11 10 01 11 15 00 11 11 11 00 16 11 00 00 00 11 17 11 00 01 10 11 18 11 00 10 01 11 19 11 00 11 11 11 20 11 11 00 00 11 21 11 11 01 10 11 22 11 11 10 01 11

Claim 16

A bilateral repeater for connection in a transmission line arranged to transmit data between two spaced points comprising a network having data inputs A and B, data outputs C and D, data output C being connected to data input B at a first terminal arranged for connection to said transmission line, data output D being connected to data input A at a second terminal arranged for connection to said transmission line, and bilateral circuitry for producing control outputs Y1 and Y2 in response to data initiating signals applied at said first and second terminals as set out in the following state flow diagram (entries indicating next Y1 Y2 conditions): A,B 11 10 01 00 Y1, Y2 00 00 10 01 I 01 00 01 01 01 10 00 10 10 10 11 II III IV V where values I-V are related to one another as follows: I II III IV V 1 00 00 00 00 00 2 00 00 00 00 11 3 00 00 01 10 00 4 00 00 01 10 11 5 00 00 10 01 00 6 00 00 10 01 11 7 00 00 11 11 00 8 00 00 11 11 11 9 00 11 00 00 00 10 00 11 00 00 11 11 00 11 01 10 00 12 00 11 01 10 11 13 00 11 10 01 00 14 00 11 10 01 11 15 00 11 11 11 00 16 11 00 00 00 11 17 11 00 01 10 11 18 11 00 10 01 11 19 11 00 11 11 11 20 11 11 00 00 11 21 11 11 01 10 11 22 11 11 10 01 11

Claim 17

The system as claimed in claim 12 wherein the values I-V are related to one another as follows: I II III IV V 1 00 00 01 10 00 2 00 00 01 10 11 3 00 11 01 10 00 4 00 11 01 10 115 11 00 01 10 11 6 11 11 01 10 11

Claim 18

The system as claimed in claim 12 wherein the preferred values I-V are related to one another as follows: I II III IV V 11 00 01 10 11

Claim 19

A bi-directional digital data transmission system comprising a common transmission line for transmitting digital data between two spaced points and a network connected in the transmission line between the two spaced points, said network including two terminals, two transducer components, each of said components having an input and an output and being connected to respond to an initiating data signal applied via one of said terminals to its input and apply a corresponding data signal via its output to the other of said terminals, two auxiliary control circuits, one control circuit being associated with each transducer component, and each said control circuit providing in response to an initiating data signal applied at one terminal, a first output that enables its associated transducer component to apply an output data signal at the other terminal as long as the initiating data signal continues to be applied at said one terminal, a second output that prevents the other transducing component from applying an output data signal to said one terminal as long as the initiating data signal continues to be applied at said one terminal, and a third output that enables the other transducing component to respond to an initiating data signal applied at said other terminal immediately after the initiating data signal ceases to be applied at said one terminal.

Claim 20

A bi-directional digital data transmission system comprising a common transmission line for transmitting digital data between two spaced points and a network connected in the transmission line between the two spaced points, said network including two terminals, two transducer components, each of said components having an input and an output and being connected to respond to an initiating data signal applied via one of said terminals to its input and apply a corresponding data signal via its output to the other of said terminals, two auxiliary control circuits, one control circuit being associated with each transducer component, and each said control circuit providing in response to an initiating data signal applied at one terminal, a first output that enables its associated transducer component to apply an output data signal at the other terminal as long as the initiating data signal continues to be applied at said one terminal, a second output that prevents the other transducing component from applying an output data signal to said one terminal as long as the initiating data signal continues to be applied at said one terminal, and a third output that enables the other transducing component to respond to an initiating data signal applied at said other terminal immediately after the initiating data signal ceases to be applied at said one terminal.

Claim 21

The system as claimed in claim 15 and further including an inverter connected in circuit between each said terminal and the input of the transducing component connected to respond to the initiating data signal applied to that terminal.

Claim 22

The repeater as claimed in claim 15 wherein said transmission line is a pair of conductors for transmitting binary data between digital data processing devices that include digital driver logic devices connected to said transmission line in logical OR relation with said transducing components.

Claim 23

The repeater as claimed in claim 17 wherein each said transducing component is a digital logic device selected from the class consisting of diode transistor logic (DTL) and transistor transistor logic (TTL) devices.

Claim 24

The data system as claimed in claim 15 wherein said auxiliary control circuits produce control outputs (Y1, Y2) as a function of initiating data signals (A, B) applied at said terminals in accordance with the following excitation table (entries indicating next Y1Y2 conditions): A,B 11 10 01 00 Y1, Y2 00 00 10 01 I 01 00 01 01 01 10 00 10 10 10 11 II III IV V where values I-V are related to one another as follows: I II III IV V 1 00 00 00 00 00 2 00 00 00 00 11 3 00 00 01 10 00 4 00 00 01 10 11 5 00 00 10 01 00 6 00 00 10 01 11 7 00 00 11 11 00 8 00 00 11 11 11 9 00 11 00 00 00 10 00 11 00 00 11 11 00 11 01 10 00 12 00 11 01 10 11 13 00 11 10 01 00 14 00 11 10 01 11 15 00 11 11 11 00 16 11 00 00 00 11 17 11 00 01 10 11 18 11 00 10 01 11 19 11 00 11 11 11 20 11 11 00 00 11 21 11 11 01 10 11 22 11 11 10 01 11

Claim 25

The system as claimed in claim 19 wherein the values I-V are related to one another as follows: I II III IV V1 00 00 01 10 00 2 00 00 01 10 11 3 00 11 01 10 00 4 00 11 01 10 11 5 11 00 01 10 11 6 11 11 01 10 11

Claim 26

The system as claimed in claim 19 wherein the preferred values I-V are related to one another as follows: I II III IV V 11 00 01 10 11