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US3671776A
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Digital signal synchronizing system
Assignee: Xerox Corp
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Filing: 1970-05-01
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Granted: 1972-06-20
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Expires: 1990-05-01
Abstract
Abstract A digital signal synchronizing system wherein a locally generated timing signal is compared with received binary data. If the timing signal lags the bit rate of the binary data, pulses are added to the timing signal and if the timing signal leads the binary data, pulses are deleted from the timing signal. Means are provided for controlling the bandwidth of the system and the system, in addition, has a phase versus frequency response which is substantially constant over the range of operating frequencies.
Inventors
- 👤 Robert D Houston
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 20:29
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/02; H04L7/033; H04L7/0331; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03L7/0991; H03L7/0992; H03L7/0993
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
392 words
A digital signal synchronizing system comprising:: a. means for receiving data signals having a bit rate Fb, b. first means for locally generating a pulse signal train having a frequency equal to N times fb wherein fb is approximately equal to Fb, c. second means for locally generating a pulse signal train having a frequency fc wherein fc is less than fb, said second generating means comprising an astable multivibrator and further including first and second differentiating means coupled to the output of said multivibrator, the output of said first generating means synchronizing said second generating means whereby coincidence between the output pulses produced by said first and second generating means is prevented, d. frequency divider means for locally generating a master timing pulse signal train having an instantaneous frequency of fb + OR - (fc/N), e. digital logic means for comparing the time phase relationship between each data signal transition and each pulse in said master pulse signal train, and f. gating means coupled to the output of said first and second generating means and said comparing means for producing pulse trains having fRequencies Nfb + fc and Nfb - fc, respectively, said gating means passing the pulse train having the frequency Nfb + fc to said master timing generating means if the output of the master timing generating means lags the input data binary bit rate and for passing the pulse train having the frequency Nfb - fc to the master timing generating means output if said master timing generating means leads the input data binary bit rate, said gating means comprising first and second NAND gates one input of which is coupled to the output of said first and second differentiating circuits, respectively, means for connecting the other input of said NAND gates to the output of said comparing means, means for connecting the output of said first NAND gate to one input of an AND gate, a third NAND gate having one input connected to the output of said second NAND gate, means for connecting the output of said first generating means to the other input of said third NAND gate, means for connecting the output of said third NAND gate to the other input of said AND gate and means for coupling the output of said AND gate to the input of said master timing generating means.
Claim 2
Dependent Claim
392 words
A digital signal synchronizing system comprising:: a. means for receiving data signals having a bit rate Fb, b. first means for locally generating a pulse signal train having a frequency equal to N times fb wherein fb is approximately equal to Fb, c. second means for locally generating a pulse signal train having a frequency fc wherein fc is less than fb, said second generating means comprising an astable multivibrator and further including first and second differentiating means coupled to the output of said multivibrator, the output of said first generating means synchronizing said second generating means whereby coincidence between the output pulses produced by said first and second generating means is prevented, d. frequency divider means for locally generating a master timing pulse signal train having an instantaneous frequency of fb + OR - (fc/N), e. digital logic means for comparing the time phase relationship between each data signal transition and each pulse in said master pulse signal train, and f. gating means coupled to the output of said first and second generating means and said comparing means for producing pulse trains having fRequencies Nfb + fc and Nfb - fc, respectively, said gating means passing the pulse train having the frequency Nfb + fc to said master timing generating means if the output of the master timing generating means lags the input data binary bit rate and for passing the pulse train having the frequency Nfb - fc to the master timing generating means output if said master timing generating means leads the input data binary bit rate, said gating means comprising first and second NAND gates one input of which is coupled to the output of said first and second differentiating circuits, respectively, means for connecting the other input of said NAND gates to the output of said comparing means, means for connecting the output of said first NAND gate to one input of an AND gate, a third NAND gate having one input connected to the output of said second NAND gate, means for connecting the output of said first generating means to the other input of said third NAND gate, means for connecting the output of said third NAND gate to the other input of said AND gate and means for coupling the output of said AND gate to the input of said master timing generating means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-20 | 1975-12-20 | 1976-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-20 | 1979-12-20 | 1980-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-20 | 1983-12-20 | 1984-06-20 | $7700.00 | Window Closed / Lapsed |