US3671775A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Pulse shaping circuit with multiplier application
Assignee: GTE Sylvania Inc
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Filing: 1970-04-27
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Granted: 1972-06-20
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Expires: 1990-04-27
Abstract
Abstract A pulse shaping circuit comprising a series resonant circuit and a shunt resistor-diode damping circuit in combination with a square wave input and a grounded base transistor load to provide a pulse of controlled width and amplitude. The damping circuit dissipates all but the first half cycle of resonant circuit ringing. A dual circuit employs a parallel resonant circuit and common emitter load transistor. In a frequency multiplier application, the resonant circuit is tuned to the desired harmonic frequency and a bandpass filter is connected at the transistor output.
Inventors
- 👤 George H Kam
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 21:00
CPC Classifications
H; H03; H03B; H03B19/00; H03B19/16; H03K; H03K5/00; H03K5/01
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
74 words
A pulse shaping circuit comprising, in combination, signal input means, a resonant circuit coupled to said input means, signal output means, gating means responsive to the excitation of ringing in said resonant circuit by an input signal for gating a pulse comprising the first half cycle of said ringing to said output means, and damping means responsive to said ringing for substantially damping all of said ringing subsequent to the first half cycle thereof.
Claim 2
Dependent Claim
74 words
A pulse shaping circuit comprising, in combination, signal input means, a resonant circuit coupled to said input means, signal output means, gating means responsive to the excitation of ringing in said resonant circuit by an input signal for gating a pulse comprising the first half cycle of said ringing to said output means, and damping means responsive to said ringing for substantially damping all of said ringing subsequent to the first half cycle thereof.
Claim 3
Dependent Claim
24 words
A pulse shaping circuit according to claim 1 wherein said signal input means comprises means for generating a square wave signal of predetermined amplitude.
Claim 4
Dependent Claim
29 words
A pulse shaping circuit according to claim 1 wherein said resonant circuit comprises a series resonant circuit tuned to resonance at a frequency having a predetermined half cycle period.
Claim 5
Dependent Claim
47 words
A pulse shaping circuit according to claim 3 wherein said signal input means comprises means for normally supplying a voltage to said series resonant circuit and pulse responsive means for interrupting said supply of voltage to said resonant circuit whereby said resonant circuit is excited into ringing.
Claim 6
Dependent Claim
70 words
A pulse shaping circuit according to claim 3 wherein said gating means has a low input impedance during the gating of the first half cycle of said ringing to said output means, and said damping means comprises a switch controlled high impedance circuit, said high impedance circuit being connected as the load for said series resonant circuit in response to said ringing and subsequent to the first half cycle thereof.
Claim 7
Dependent Claim
34 words
A pulse shaping circuit according to claim 5 wherein said damping means comprises a diode and damping resistor serially connected between the output of said series resonant circuit and a source of reference potential.
Claim 8
Dependent Claim
29 words
A pulse shaping circuit according to claim 5 wherein said gating means comprises an amplifier connected between the output of said series resonant circuit and said signal output means.
Claim 9
Dependent Claim
98 words
A pulse shaping circuit according to claim 7 wherein said signal input means comprises a square wave voltage source operative to apply a square wave of frequency f to said series resonant circuit, said signal output means includes a filter connected to the output of said amplifier for producing an output signal of frequency nf, where n is an integer, in response to the gating of a pulse from said amplifier having a period of 1/2nf, and said series resonant circuit is tuned to resonance at the frequency nf, said pulse shaping circuit thereby comprising a frequency multiplier.
Claim 10
Dependent Claim
29 words
A pulse shaping circuit according to claim 1 wherein said resonant circuit comprises a parallel resonant circuit tuned to antiresonance at a frequency having a predetermined half cycle period.
Claim 11
Dependent Claim
48 words
A pulse shaping circuit according to claim 9 wherein said signal input means comprises means for normally supplying current to said parallel resonant circuit and pulse responsive means for interrupting said supply of current to said parallel resonant circuit whereby said parallel resonant circuit is excited into ringing.
Claim 12
Dependent Claim
63 words
A pulse shaping circuit according to claim 9 wherein said gating means has a high input impedance during the gating of the first half cycle of said ringing to said output means, and said damping means comprises switching means for connecting a low impedance load to said parallel resonant circuit in response to said ringing and subsequent to the first half cycle thereof.
Claim 13
Dependent Claim
21 words
A pulse shaping circuit according to claim 11 wherein said damping means comprIses a diode connected across said parallel resonant circuit.
Claim 14
Dependent Claim
25 words
A pulse shaping circuit according to claim 11 wherein said gating means comprises an amplifier connected between said parallel resonant circuit and said output means.
Claim 15
Dependent Claim
98 words
A pulse shaping circuit according to claim 13 wherein said signal input means comprises a square wave current source operative to apply a square wave of frequency f to said parallel resonant circuit, said signal output means includes a filter connected to the output of said amplifier for producing an output signal of frequency nf, where n is an integer, in response to the gating of a pulse from said amplifier having a period of 1/2nf, and said parallel resonant circuit is tuned to antiresonance at the frequency nf, said pulse shaping circuit thereby comprising a frequency multiplier.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1975-06-20 | 1975-12-20 | 1976-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1979-06-20 | 1979-12-20 | 1980-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1983-06-20 | 1983-12-20 | 1984-06-20 | $7700.00 | Window Closed / Lapsed |